gbdk-2020 | GameBoy Development Kit |
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docs/api/gb_2hardware_8h.html
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101 <div class="header">
102 <div class="summary">
103 <a href="#define-members">Macros</a> |
104 <a href="#var-members">Variables</a> </div>
105 <div class="headertitle"><div class="title">hardware.h File Reference</div></div>
106 </div><!--header-->
107 <div class="contents">
108 <div class="textblock"><code>#include <types.h></code><br />
109 </div>
110 <p><a href="gb_2hardware_8h_source.html">Go to the source code of this file.</a></p>
111 <table class="memberdecls">
112 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
113 Macros</h2></td></tr>
114 <tr class="memitem:__BYTES"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#__BYTES">__BYTES</a>   extern <a class="el" href="asm_2types_8h.html#UBYTE">UBYTE</a></td></tr>
115 <tr class="separator:__BYTES"><td class="memSeparator" colspan="2"> </td></tr>
116 <tr class="memitem:__BYTE_REG"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a>   extern volatile <a class="el" href="asm_2types_8h.html#UBYTE">UBYTE</a></td></tr>
117 <tr class="separator:__BYTE_REG"><td class="memSeparator" colspan="2"> </td></tr>
118 <tr class="memitem:__REG"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#__REG">__REG</a>   extern volatile <a class="el" href="asm_2types_8h.html#SFR">SFR</a></td></tr>
119 <tr class="separator:__REG"><td class="memSeparator" colspan="2"> </td></tr>
120 <tr class="memitem:MBC7_LATCH_ERASE"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#MBC7_LATCH_ERASE">MBC7_LATCH_ERASE</a>   0x55u</td></tr>
121 <tr class="separator:MBC7_LATCH_ERASE"><td class="memSeparator" colspan="2"> </td></tr>
122 <tr class="memitem:MBC7_LATCH_CAPTURE"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#MBC7_LATCH_CAPTURE">MBC7_LATCH_CAPTURE</a>   0xAAu</td></tr>
123 <tr class="separator:MBC7_LATCH_CAPTURE"><td class="memSeparator" colspan="2"> </td></tr>
124 <tr class="memitem:MBC7_SRAM_ENABLE_KEY_1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#MBC7_SRAM_ENABLE_KEY_1">MBC7_SRAM_ENABLE_KEY_1</a>   0x0Au</td></tr>
125 <tr class="separator:MBC7_SRAM_ENABLE_KEY_1"><td class="memSeparator" colspan="2"> </td></tr>
126 <tr class="memitem:MBC7_SRAM_ENABLE_KEY_2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#MBC7_SRAM_ENABLE_KEY_2">MBC7_SRAM_ENABLE_KEY_2</a>   0x40u</td></tr>
127 <tr class="separator:MBC7_SRAM_ENABLE_KEY_2"><td class="memSeparator" colspan="2"> </td></tr>
128 <tr class="memitem:rP1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rP1">rP1</a>   <a class="el" href="gb_2hardware_8h.html#P1_REG">P1_REG</a></td></tr>
129 <tr class="separator:rP1"><td class="memSeparator" colspan="2"> </td></tr>
130 <tr class="memitem:P1F_5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#P1F_5">P1F_5</a>   0b00100000</td></tr>
131 <tr class="separator:P1F_5"><td class="memSeparator" colspan="2"> </td></tr>
132 <tr class="memitem:P1F_4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#P1F_4">P1F_4</a>   0b00010000</td></tr>
133 <tr class="separator:P1F_4"><td class="memSeparator" colspan="2"> </td></tr>
134 <tr class="memitem:P1F_3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#P1F_3">P1F_3</a>   0b00001000</td></tr>
135 <tr class="separator:P1F_3"><td class="memSeparator" colspan="2"> </td></tr>
136 <tr class="memitem:P1F_2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#P1F_2">P1F_2</a>   0b00000100</td></tr>
137 <tr class="separator:P1F_2"><td class="memSeparator" colspan="2"> </td></tr>
138 <tr class="memitem:P1F_1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#P1F_1">P1F_1</a>   0b00000010</td></tr>
139 <tr class="separator:P1F_1"><td class="memSeparator" colspan="2"> </td></tr>
140 <tr class="memitem:P1F_0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#P1F_0">P1F_0</a>   0b00000001</td></tr>
141 <tr class="separator:P1F_0"><td class="memSeparator" colspan="2"> </td></tr>
142 <tr class="memitem:P1F_GET_DPAD"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#P1F_GET_DPAD">P1F_GET_DPAD</a>   <a class="el" href="gb_2hardware_8h.html#P1F_5">P1F_5</a></td></tr>
143 <tr class="separator:P1F_GET_DPAD"><td class="memSeparator" colspan="2"> </td></tr>
144 <tr class="memitem:P1F_GET_BTN"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#P1F_GET_BTN">P1F_GET_BTN</a>   <a class="el" href="gb_2hardware_8h.html#P1F_4">P1F_4</a></td></tr>
145 <tr class="separator:P1F_GET_BTN"><td class="memSeparator" colspan="2"> </td></tr>
146 <tr class="memitem:P1F_GET_NONE"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#P1F_GET_NONE">P1F_GET_NONE</a>   (<a class="el" href="gb_2hardware_8h.html#P1F_4">P1F_4</a> | <a class="el" href="gb_2hardware_8h.html#P1F_5">P1F_5</a>)</td></tr>
147 <tr class="separator:P1F_GET_NONE"><td class="memSeparator" colspan="2"> </td></tr>
148 <tr class="memitem:rSB"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rSB">rSB</a>   <a class="el" href="gb_2hardware_8h.html#SB_REG">SB_REG</a></td></tr>
149 <tr class="separator:rSB"><td class="memSeparator" colspan="2"> </td></tr>
150 <tr class="memitem:rSC"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rSC">rSC</a>   <a class="el" href="gb_2hardware_8h.html#SC_REG">SC_REG</a></td></tr>
151 <tr class="separator:rSC"><td class="memSeparator" colspan="2"> </td></tr>
152 <tr class="memitem:SIOF_XFER_START"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SIOF_XFER_START">SIOF_XFER_START</a>   0b10000000</td></tr>
153 <tr class="separator:SIOF_XFER_START"><td class="memSeparator" colspan="2"> </td></tr>
154 <tr class="memitem:SIOF_CLOCK_INT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SIOF_CLOCK_INT">SIOF_CLOCK_INT</a>   0b00000001</td></tr>
155 <tr class="separator:SIOF_CLOCK_INT"><td class="memSeparator" colspan="2"> </td></tr>
156 <tr class="memitem:SIOF_CLOCK_EXT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SIOF_CLOCK_EXT">SIOF_CLOCK_EXT</a>   0b00000000</td></tr>
157 <tr class="separator:SIOF_CLOCK_EXT"><td class="memSeparator" colspan="2"> </td></tr>
158 <tr class="memitem:SIOF_SPEED_1X"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SIOF_SPEED_1X">SIOF_SPEED_1X</a>   0b00000000</td></tr>
159 <tr class="separator:SIOF_SPEED_1X"><td class="memSeparator" colspan="2"> </td></tr>
160 <tr class="memitem:SIOF_SPEED_32X"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SIOF_SPEED_32X">SIOF_SPEED_32X</a>   0b00000010</td></tr>
161 <tr class="separator:SIOF_SPEED_32X"><td class="memSeparator" colspan="2"> </td></tr>
162 <tr class="memitem:SIOF_B_CLOCK"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SIOF_B_CLOCK">SIOF_B_CLOCK</a>   0</td></tr>
163 <tr class="separator:SIOF_B_CLOCK"><td class="memSeparator" colspan="2"> </td></tr>
164 <tr class="memitem:SIOF_B_SPEED"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SIOF_B_SPEED">SIOF_B_SPEED</a>   1</td></tr>
165 <tr class="separator:SIOF_B_SPEED"><td class="memSeparator" colspan="2"> </td></tr>
166 <tr class="memitem:SIOF_B_XFER_START"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SIOF_B_XFER_START">SIOF_B_XFER_START</a>   7</td></tr>
167 <tr class="separator:SIOF_B_XFER_START"><td class="memSeparator" colspan="2"> </td></tr>
168 <tr class="memitem:SCF_START"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SCF_START">SCF_START</a>   <a class="el" href="gb_2hardware_8h.html#SIOF_XFER_START">SIOF_XFER_START</a></td></tr>
169 <tr class="separator:SCF_START"><td class="memSeparator" colspan="2"> </td></tr>
170 <tr class="memitem:SCF_SOURCE"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SCF_SOURCE">SCF_SOURCE</a>   <a class="el" href="gb_2hardware_8h.html#SIOF_CLOCK_INT">SIOF_CLOCK_INT</a></td></tr>
171 <tr class="separator:SCF_SOURCE"><td class="memSeparator" colspan="2"> </td></tr>
172 <tr class="memitem:SCF_SPEED"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SCF_SPEED">SCF_SPEED</a>   <a class="el" href="gb_2hardware_8h.html#SIOF_SPEED_32X">SIOF_SPEED_32X</a></td></tr>
173 <tr class="separator:SCF_SPEED"><td class="memSeparator" colspan="2"> </td></tr>
174 <tr class="memitem:rDIV"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rDIV">rDIV</a>   <a class="el" href="gb_2hardware_8h.html#DIV_REG">DIV_REG</a></td></tr>
175 <tr class="separator:rDIV"><td class="memSeparator" colspan="2"> </td></tr>
176 <tr class="memitem:rTIMA"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rTIMA">rTIMA</a>   <a class="el" href="sms_2hardware_8h.html#TIMA_REG">TIMA_REG</a></td></tr>
177 <tr class="separator:rTIMA"><td class="memSeparator" colspan="2"> </td></tr>
178 <tr class="memitem:rTMA"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rTMA">rTMA</a>   <a class="el" href="sms_2hardware_8h.html#TMA_REG">TMA_REG</a></td></tr>
179 <tr class="separator:rTMA"><td class="memSeparator" colspan="2"> </td></tr>
180 <tr class="memitem:rTAC"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rTAC">rTAC</a>   <a class="el" href="sms_2hardware_8h.html#TAC_REG">TAC_REG</a></td></tr>
181 <tr class="separator:rTAC"><td class="memSeparator" colspan="2"> </td></tr>
182 <tr class="memitem:TACF_START"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#TACF_START">TACF_START</a>   0b00000100</td></tr>
183 <tr class="separator:TACF_START"><td class="memSeparator" colspan="2"> </td></tr>
184 <tr class="memitem:TACF_STOP"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#TACF_STOP">TACF_STOP</a>   0b00000000</td></tr>
185 <tr class="separator:TACF_STOP"><td class="memSeparator" colspan="2"> </td></tr>
186 <tr class="memitem:TACF_4KHZ"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#TACF_4KHZ">TACF_4KHZ</a>   0b00000000</td></tr>
187 <tr class="separator:TACF_4KHZ"><td class="memSeparator" colspan="2"> </td></tr>
188 <tr class="memitem:TACF_16KHZ"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#TACF_16KHZ">TACF_16KHZ</a>   0b00000011</td></tr>
189 <tr class="separator:TACF_16KHZ"><td class="memSeparator" colspan="2"> </td></tr>
190 <tr class="memitem:TACF_65KHZ"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#TACF_65KHZ">TACF_65KHZ</a>   0b00000010</td></tr>
191 <tr class="separator:TACF_65KHZ"><td class="memSeparator" colspan="2"> </td></tr>
192 <tr class="memitem:TACF_262KHZ"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#TACF_262KHZ">TACF_262KHZ</a>   0b00000001</td></tr>
193 <tr class="separator:TACF_262KHZ"><td class="memSeparator" colspan="2"> </td></tr>
194 <tr class="memitem:rIF"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rIF">rIF</a>   <a class="el" href="gb_2hardware_8h.html#IF_REG">IF_REG</a></td></tr>
195 <tr class="separator:rIF"><td class="memSeparator" colspan="2"> </td></tr>
196 <tr class="memitem:rAUD1SWEEP"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD1SWEEP">rAUD1SWEEP</a>   <a class="el" href="gb_2hardware_8h.html#NR10_REG">NR10_REG</a></td></tr>
197 <tr class="separator:rAUD1SWEEP"><td class="memSeparator" colspan="2"> </td></tr>
198 <tr class="memitem:AUD1SWEEP_UP"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUD1SWEEP_UP">AUD1SWEEP_UP</a>   0b00000000</td></tr>
199 <tr class="separator:AUD1SWEEP_UP"><td class="memSeparator" colspan="2"> </td></tr>
200 <tr class="memitem:AUD1SWEEP_DOWN"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUD1SWEEP_DOWN">AUD1SWEEP_DOWN</a>   0b00001000</td></tr>
201 <tr class="separator:AUD1SWEEP_DOWN"><td class="memSeparator" colspan="2"> </td></tr>
202 <tr class="memitem:AUD1SWEEP_TIME"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUD1SWEEP_TIME">AUD1SWEEP_TIME</a>(x)   ((x) << 4)</td></tr>
203 <tr class="separator:AUD1SWEEP_TIME"><td class="memSeparator" colspan="2"> </td></tr>
204 <tr class="memitem:AUD1SWEEP_LENGTH"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUD1SWEEP_LENGTH">AUD1SWEEP_LENGTH</a>(x)   (x)</td></tr>
205 <tr class="separator:AUD1SWEEP_LENGTH"><td class="memSeparator" colspan="2"> </td></tr>
206 <tr class="memitem:rAUD1LEN"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD1LEN">rAUD1LEN</a>   <a class="el" href="gb_2hardware_8h.html#NR11_REG">NR11_REG</a></td></tr>
207 <tr class="separator:rAUD1LEN"><td class="memSeparator" colspan="2"> </td></tr>
208 <tr class="memitem:rAUD1ENV"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD1ENV">rAUD1ENV</a>   <a class="el" href="gb_2hardware_8h.html#NR12_REG">NR12_REG</a></td></tr>
209 <tr class="separator:rAUD1ENV"><td class="memSeparator" colspan="2"> </td></tr>
210 <tr class="memitem:rAUD1LOW"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD1LOW">rAUD1LOW</a>   <a class="el" href="gb_2hardware_8h.html#NR13_REG">NR13_REG</a></td></tr>
211 <tr class="separator:rAUD1LOW"><td class="memSeparator" colspan="2"> </td></tr>
212 <tr class="memitem:rAUD1HIGH"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD1HIGH">rAUD1HIGH</a>   <a class="el" href="gb_2hardware_8h.html#NR14_REG">NR14_REG</a></td></tr>
213 <tr class="separator:rAUD1HIGH"><td class="memSeparator" colspan="2"> </td></tr>
214 <tr class="memitem:rAUD2LEN"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD2LEN">rAUD2LEN</a>   <a class="el" href="gb_2hardware_8h.html#NR21_REG">NR21_REG</a></td></tr>
215 <tr class="separator:rAUD2LEN"><td class="memSeparator" colspan="2"> </td></tr>
216 <tr class="memitem:rAUD2ENV"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD2ENV">rAUD2ENV</a>   <a class="el" href="gb_2hardware_8h.html#NR22_REG">NR22_REG</a></td></tr>
217 <tr class="separator:rAUD2ENV"><td class="memSeparator" colspan="2"> </td></tr>
218 <tr class="memitem:rAUD2LOW"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD2LOW">rAUD2LOW</a>   <a class="el" href="gb_2hardware_8h.html#NR23_REG">NR23_REG</a></td></tr>
219 <tr class="separator:rAUD2LOW"><td class="memSeparator" colspan="2"> </td></tr>
220 <tr class="memitem:rAUD2HIGH"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD2HIGH">rAUD2HIGH</a>   <a class="el" href="gb_2hardware_8h.html#NR24_REG">NR24_REG</a></td></tr>
221 <tr class="separator:rAUD2HIGH"><td class="memSeparator" colspan="2"> </td></tr>
222 <tr class="memitem:rAUD3ENA"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD3ENA">rAUD3ENA</a>   <a class="el" href="gb_2hardware_8h.html#NR30_REG">NR30_REG</a></td></tr>
223 <tr class="separator:rAUD3ENA"><td class="memSeparator" colspan="2"> </td></tr>
224 <tr class="memitem:rAUD3LEN"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD3LEN">rAUD3LEN</a>   <a class="el" href="gb_2hardware_8h.html#NR31_REG">NR31_REG</a></td></tr>
225 <tr class="separator:rAUD3LEN"><td class="memSeparator" colspan="2"> </td></tr>
226 <tr class="memitem:rAUD3LEVEL"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD3LEVEL">rAUD3LEVEL</a>   <a class="el" href="gb_2hardware_8h.html#NR32_REG">NR32_REG</a></td></tr>
227 <tr class="separator:rAUD3LEVEL"><td class="memSeparator" colspan="2"> </td></tr>
228 <tr class="memitem:rAUD3LOW"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD3LOW">rAUD3LOW</a>   <a class="el" href="gb_2hardware_8h.html#NR33_REG">NR33_REG</a></td></tr>
229 <tr class="separator:rAUD3LOW"><td class="memSeparator" colspan="2"> </td></tr>
230 <tr class="memitem:rAUD3HIGH"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD3HIGH">rAUD3HIGH</a>   <a class="el" href="gb_2hardware_8h.html#NR34_REG">NR34_REG</a></td></tr>
231 <tr class="separator:rAUD3HIGH"><td class="memSeparator" colspan="2"> </td></tr>
232 <tr class="memitem:rAUD4LEN"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD4LEN">rAUD4LEN</a>   <a class="el" href="gb_2hardware_8h.html#NR41_REG">NR41_REG</a></td></tr>
233 <tr class="separator:rAUD4LEN"><td class="memSeparator" colspan="2"> </td></tr>
234 <tr class="memitem:rAUD4ENV"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD4ENV">rAUD4ENV</a>   <a class="el" href="gb_2hardware_8h.html#NR42_REG">NR42_REG</a></td></tr>
235 <tr class="separator:rAUD4ENV"><td class="memSeparator" colspan="2"> </td></tr>
236 <tr class="memitem:rAUD4POLY"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD4POLY">rAUD4POLY</a>   <a class="el" href="gb_2hardware_8h.html#NR43_REG">NR43_REG</a></td></tr>
237 <tr class="separator:rAUD4POLY"><td class="memSeparator" colspan="2"> </td></tr>
238 <tr class="memitem:AUD4POLY_WIDTH_15BIT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUD4POLY_WIDTH_15BIT">AUD4POLY_WIDTH_15BIT</a>   0x00</td></tr>
239 <tr class="separator:AUD4POLY_WIDTH_15BIT"><td class="memSeparator" colspan="2"> </td></tr>
240 <tr class="memitem:AUD4POLY_WIDTH_7BIT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUD4POLY_WIDTH_7BIT">AUD4POLY_WIDTH_7BIT</a>   0x08</td></tr>
241 <tr class="separator:AUD4POLY_WIDTH_7BIT"><td class="memSeparator" colspan="2"> </td></tr>
242 <tr class="memitem:rAUD4GO"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUD4GO">rAUD4GO</a>   <a class="el" href="gb_2hardware_8h.html#NR44_REG">NR44_REG</a></td></tr>
243 <tr class="separator:rAUD4GO"><td class="memSeparator" colspan="2"> </td></tr>
244 <tr class="memitem:rAUDVOL"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUDVOL">rAUDVOL</a>   <a class="el" href="gb_2hardware_8h.html#NR50_REG">NR50_REG</a></td></tr>
245 <tr class="separator:rAUDVOL"><td class="memSeparator" colspan="2"> </td></tr>
246 <tr class="memitem:AUDVOL_VOL_LEFT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDVOL_VOL_LEFT">AUDVOL_VOL_LEFT</a>(x)   ((x) << 4)</td></tr>
247 <tr class="separator:AUDVOL_VOL_LEFT"><td class="memSeparator" colspan="2"> </td></tr>
248 <tr class="memitem:AUDVOL_VOL_RIGHT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDVOL_VOL_RIGHT">AUDVOL_VOL_RIGHT</a>(x)   ((x))</td></tr>
249 <tr class="separator:AUDVOL_VOL_RIGHT"><td class="memSeparator" colspan="2"> </td></tr>
250 <tr class="memitem:AUDVOL_VIN_LEFT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDVOL_VIN_LEFT">AUDVOL_VIN_LEFT</a>   0b10000000</td></tr>
251 <tr class="separator:AUDVOL_VIN_LEFT"><td class="memSeparator" colspan="2"> </td></tr>
252 <tr class="memitem:AUDVOL_VIN_RIGHT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDVOL_VIN_RIGHT">AUDVOL_VIN_RIGHT</a>   0b00001000</td></tr>
253 <tr class="separator:AUDVOL_VIN_RIGHT"><td class="memSeparator" colspan="2"> </td></tr>
254 <tr class="memitem:rAUDTERM"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUDTERM">rAUDTERM</a>   <a class="el" href="gb_2hardware_8h.html#NR51_REG">NR51_REG</a></td></tr>
255 <tr class="separator:rAUDTERM"><td class="memSeparator" colspan="2"> </td></tr>
256 <tr class="memitem:AUDTERM_4_LEFT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDTERM_4_LEFT">AUDTERM_4_LEFT</a>   0b10000000</td></tr>
257 <tr class="separator:AUDTERM_4_LEFT"><td class="memSeparator" colspan="2"> </td></tr>
258 <tr class="memitem:AUDTERM_3_LEFT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDTERM_3_LEFT">AUDTERM_3_LEFT</a>   0b01000000</td></tr>
259 <tr class="separator:AUDTERM_3_LEFT"><td class="memSeparator" colspan="2"> </td></tr>
260 <tr class="memitem:AUDTERM_2_LEFT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDTERM_2_LEFT">AUDTERM_2_LEFT</a>   0b00100000</td></tr>
261 <tr class="separator:AUDTERM_2_LEFT"><td class="memSeparator" colspan="2"> </td></tr>
262 <tr class="memitem:AUDTERM_1_LEFT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDTERM_1_LEFT">AUDTERM_1_LEFT</a>   0b00010000</td></tr>
263 <tr class="separator:AUDTERM_1_LEFT"><td class="memSeparator" colspan="2"> </td></tr>
264 <tr class="memitem:AUDTERM_4_RIGHT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDTERM_4_RIGHT">AUDTERM_4_RIGHT</a>   0b00001000</td></tr>
265 <tr class="separator:AUDTERM_4_RIGHT"><td class="memSeparator" colspan="2"> </td></tr>
266 <tr class="memitem:AUDTERM_3_RIGHT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDTERM_3_RIGHT">AUDTERM_3_RIGHT</a>   0b00000100</td></tr>
267 <tr class="separator:AUDTERM_3_RIGHT"><td class="memSeparator" colspan="2"> </td></tr>
268 <tr class="memitem:AUDTERM_2_RIGHT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDTERM_2_RIGHT">AUDTERM_2_RIGHT</a>   0b00000010</td></tr>
269 <tr class="separator:AUDTERM_2_RIGHT"><td class="memSeparator" colspan="2"> </td></tr>
270 <tr class="memitem:AUDTERM_1_RIGHT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDTERM_1_RIGHT">AUDTERM_1_RIGHT</a>   0b00000001</td></tr>
271 <tr class="separator:AUDTERM_1_RIGHT"><td class="memSeparator" colspan="2"> </td></tr>
272 <tr class="memitem:rAUDENA"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rAUDENA">rAUDENA</a>   <a class="el" href="gb_2hardware_8h.html#NR52_REG">NR52_REG</a></td></tr>
273 <tr class="separator:rAUDENA"><td class="memSeparator" colspan="2"> </td></tr>
274 <tr class="memitem:AUDENA_ON"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDENA_ON">AUDENA_ON</a>   0b10000000</td></tr>
275 <tr class="separator:AUDENA_ON"><td class="memSeparator" colspan="2"> </td></tr>
276 <tr class="memitem:AUDENA_OFF"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDENA_OFF">AUDENA_OFF</a>   0b00000000</td></tr>
277 <tr class="separator:AUDENA_OFF"><td class="memSeparator" colspan="2"> </td></tr>
278 <tr class="memitem:rLCDC"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rLCDC">rLCDC</a>   <a class="el" href="gb_2hardware_8h.html#LCDC_REG">LCDC_REG</a></td></tr>
279 <tr class="separator:rLCDC"><td class="memSeparator" colspan="2"> </td></tr>
280 <tr class="memitem:LCDCF_OFF"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_OFF">LCDCF_OFF</a>   0b00000000</td></tr>
281 <tr class="separator:LCDCF_OFF"><td class="memSeparator" colspan="2"> </td></tr>
282 <tr class="memitem:LCDCF_ON"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_ON">LCDCF_ON</a>   0b10000000</td></tr>
283 <tr class="separator:LCDCF_ON"><td class="memSeparator" colspan="2"> </td></tr>
284 <tr class="memitem:LCDCF_WIN9800"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_WIN9800">LCDCF_WIN9800</a>   0b00000000</td></tr>
285 <tr class="separator:LCDCF_WIN9800"><td class="memSeparator" colspan="2"> </td></tr>
286 <tr class="memitem:LCDCF_WIN9C00"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_WIN9C00">LCDCF_WIN9C00</a>   0b01000000</td></tr>
287 <tr class="separator:LCDCF_WIN9C00"><td class="memSeparator" colspan="2"> </td></tr>
288 <tr class="memitem:LCDCF_WINOFF"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_WINOFF">LCDCF_WINOFF</a>   0b00000000</td></tr>
289 <tr class="separator:LCDCF_WINOFF"><td class="memSeparator" colspan="2"> </td></tr>
290 <tr class="memitem:LCDCF_WINON"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_WINON">LCDCF_WINON</a>   0b00100000</td></tr>
291 <tr class="separator:LCDCF_WINON"><td class="memSeparator" colspan="2"> </td></tr>
292 <tr class="memitem:LCDCF_BG8800"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_BG8800">LCDCF_BG8800</a>   0b00000000</td></tr>
293 <tr class="separator:LCDCF_BG8800"><td class="memSeparator" colspan="2"> </td></tr>
294 <tr class="memitem:LCDCF_BG8000"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_BG8000">LCDCF_BG8000</a>   0b00010000</td></tr>
295 <tr class="separator:LCDCF_BG8000"><td class="memSeparator" colspan="2"> </td></tr>
296 <tr class="memitem:LCDCF_BG9800"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_BG9800">LCDCF_BG9800</a>   0b00000000</td></tr>
297 <tr class="separator:LCDCF_BG9800"><td class="memSeparator" colspan="2"> </td></tr>
298 <tr class="memitem:LCDCF_BG9C00"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_BG9C00">LCDCF_BG9C00</a>   0b00001000</td></tr>
299 <tr class="separator:LCDCF_BG9C00"><td class="memSeparator" colspan="2"> </td></tr>
300 <tr class="memitem:LCDCF_OBJ8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_OBJ8">LCDCF_OBJ8</a>   0b00000000</td></tr>
301 <tr class="separator:LCDCF_OBJ8"><td class="memSeparator" colspan="2"> </td></tr>
302 <tr class="memitem:LCDCF_OBJ16"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_OBJ16">LCDCF_OBJ16</a>   0b00000100</td></tr>
303 <tr class="separator:LCDCF_OBJ16"><td class="memSeparator" colspan="2"> </td></tr>
304 <tr class="memitem:LCDCF_OBJOFF"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_OBJOFF">LCDCF_OBJOFF</a>   0b00000000</td></tr>
305 <tr class="separator:LCDCF_OBJOFF"><td class="memSeparator" colspan="2"> </td></tr>
306 <tr class="memitem:LCDCF_OBJON"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_OBJON">LCDCF_OBJON</a>   0b00000010</td></tr>
307 <tr class="separator:LCDCF_OBJON"><td class="memSeparator" colspan="2"> </td></tr>
308 <tr class="memitem:LCDCF_BGOFF"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_BGOFF">LCDCF_BGOFF</a>   0b00000000</td></tr>
309 <tr class="separator:LCDCF_BGOFF"><td class="memSeparator" colspan="2"> </td></tr>
310 <tr class="memitem:LCDCF_BGON"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_BGON">LCDCF_BGON</a>   0b00000001</td></tr>
311 <tr class="separator:LCDCF_BGON"><td class="memSeparator" colspan="2"> </td></tr>
312 <tr class="memitem:LCDCF_B_ON"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_B_ON">LCDCF_B_ON</a>   7</td></tr>
313 <tr class="separator:LCDCF_B_ON"><td class="memSeparator" colspan="2"> </td></tr>
314 <tr class="memitem:LCDCF_B_WIN9C00"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_B_WIN9C00">LCDCF_B_WIN9C00</a>   6</td></tr>
315 <tr class="separator:LCDCF_B_WIN9C00"><td class="memSeparator" colspan="2"> </td></tr>
316 <tr class="memitem:LCDCF_B_WINON"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_B_WINON">LCDCF_B_WINON</a>   5</td></tr>
317 <tr class="separator:LCDCF_B_WINON"><td class="memSeparator" colspan="2"> </td></tr>
318 <tr class="memitem:LCDCF_B_BG8000"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_B_BG8000">LCDCF_B_BG8000</a>   4</td></tr>
319 <tr class="separator:LCDCF_B_BG8000"><td class="memSeparator" colspan="2"> </td></tr>
320 <tr class="memitem:LCDCF_B_BG9C00"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_B_BG9C00">LCDCF_B_BG9C00</a>   3</td></tr>
321 <tr class="separator:LCDCF_B_BG9C00"><td class="memSeparator" colspan="2"> </td></tr>
322 <tr class="memitem:LCDCF_B_OBJ16"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_B_OBJ16">LCDCF_B_OBJ16</a>   2</td></tr>
323 <tr class="separator:LCDCF_B_OBJ16"><td class="memSeparator" colspan="2"> </td></tr>
324 <tr class="memitem:LCDCF_B_OBJON"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_B_OBJON">LCDCF_B_OBJON</a>   1</td></tr>
325 <tr class="separator:LCDCF_B_OBJON"><td class="memSeparator" colspan="2"> </td></tr>
326 <tr class="memitem:LCDCF_B_BGON"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDCF_B_BGON">LCDCF_B_BGON</a>   0</td></tr>
327 <tr class="separator:LCDCF_B_BGON"><td class="memSeparator" colspan="2"> </td></tr>
328 <tr class="memitem:rSTAT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rSTAT">rSTAT</a>   <a class="el" href="gb_2hardware_8h.html#STAT_REG">STAT_REG</a></td></tr>
329 <tr class="separator:rSTAT"><td class="memSeparator" colspan="2"> </td></tr>
330 <tr class="memitem:STATF_LYC"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_LYC">STATF_LYC</a>   0b01000000</td></tr>
331 <tr class="separator:STATF_LYC"><td class="memSeparator" colspan="2"> </td></tr>
332 <tr class="memitem:STATF_MODE10"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_MODE10">STATF_MODE10</a>   0b00100000</td></tr>
333 <tr class="separator:STATF_MODE10"><td class="memSeparator" colspan="2"> </td></tr>
334 <tr class="memitem:STATF_MODE01"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_MODE01">STATF_MODE01</a>   0b00010000</td></tr>
335 <tr class="separator:STATF_MODE01"><td class="memSeparator" colspan="2"> </td></tr>
336 <tr class="memitem:STATF_MODE00"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_MODE00">STATF_MODE00</a>   0b00001000</td></tr>
337 <tr class="separator:STATF_MODE00"><td class="memSeparator" colspan="2"> </td></tr>
338 <tr class="memitem:STATF_LYCF"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_LYCF">STATF_LYCF</a>   0b00000100</td></tr>
339 <tr class="separator:STATF_LYCF"><td class="memSeparator" colspan="2"> </td></tr>
340 <tr class="memitem:STATF_HBL"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_HBL">STATF_HBL</a>   0b00000000</td></tr>
341 <tr class="separator:STATF_HBL"><td class="memSeparator" colspan="2"> </td></tr>
342 <tr class="memitem:STATF_VBL"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_VBL">STATF_VBL</a>   0b00000001</td></tr>
343 <tr class="separator:STATF_VBL"><td class="memSeparator" colspan="2"> </td></tr>
344 <tr class="memitem:STATF_OAM"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_OAM">STATF_OAM</a>   0b00000010</td></tr>
345 <tr class="separator:STATF_OAM"><td class="memSeparator" colspan="2"> </td></tr>
346 <tr class="memitem:STATF_LCD"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_LCD">STATF_LCD</a>   0b00000011</td></tr>
347 <tr class="separator:STATF_LCD"><td class="memSeparator" colspan="2"> </td></tr>
348 <tr class="memitem:STATF_BUSY"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_BUSY">STATF_BUSY</a>   0b00000010</td></tr>
349 <tr class="separator:STATF_BUSY"><td class="memSeparator" colspan="2"> </td></tr>
350 <tr class="memitem:STATF_B_LYC"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_B_LYC">STATF_B_LYC</a>   6</td></tr>
351 <tr class="separator:STATF_B_LYC"><td class="memSeparator" colspan="2"> </td></tr>
352 <tr class="memitem:STATF_B_MODE10"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_B_MODE10">STATF_B_MODE10</a>   5</td></tr>
353 <tr class="separator:STATF_B_MODE10"><td class="memSeparator" colspan="2"> </td></tr>
354 <tr class="memitem:STATF_B_MODE01"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_B_MODE01">STATF_B_MODE01</a>   4</td></tr>
355 <tr class="separator:STATF_B_MODE01"><td class="memSeparator" colspan="2"> </td></tr>
356 <tr class="memitem:STATF_B_MODE00"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_B_MODE00">STATF_B_MODE00</a>   3</td></tr>
357 <tr class="separator:STATF_B_MODE00"><td class="memSeparator" colspan="2"> </td></tr>
358 <tr class="memitem:STATF_B_LYCF"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_B_LYCF">STATF_B_LYCF</a>   2</td></tr>
359 <tr class="separator:STATF_B_LYCF"><td class="memSeparator" colspan="2"> </td></tr>
360 <tr class="memitem:STATF_B_VBL"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_B_VBL">STATF_B_VBL</a>   0</td></tr>
361 <tr class="separator:STATF_B_VBL"><td class="memSeparator" colspan="2"> </td></tr>
362 <tr class="memitem:STATF_B_OAM"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_B_OAM">STATF_B_OAM</a>   1</td></tr>
363 <tr class="separator:STATF_B_OAM"><td class="memSeparator" colspan="2"> </td></tr>
364 <tr class="memitem:STATF_B_BUSY"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STATF_B_BUSY">STATF_B_BUSY</a>   1</td></tr>
365 <tr class="separator:STATF_B_BUSY"><td class="memSeparator" colspan="2"> </td></tr>
366 <tr class="memitem:rSCY"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rSCY">rSCY</a></td></tr>
367 <tr class="separator:rSCY"><td class="memSeparator" colspan="2"> </td></tr>
368 <tr class="memitem:rSCX"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rSCX">rSCX</a>   <a class="el" href="gb_2hardware_8h.html#SCX_REG">SCX_REG</a></td></tr>
369 <tr class="separator:rSCX"><td class="memSeparator" colspan="2"> </td></tr>
370 <tr class="memitem:rLY"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rLY">rLY</a>   <a class="el" href="gb_2hardware_8h.html#LY_REG">LY_REG</a></td></tr>
371 <tr class="separator:rLY"><td class="memSeparator" colspan="2"> </td></tr>
372 <tr class="memitem:rLYC"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rLYC">rLYC</a>   <a class="el" href="gb_2hardware_8h.html#LYC_REG">LYC_REG</a></td></tr>
373 <tr class="separator:rLYC"><td class="memSeparator" colspan="2"> </td></tr>
374 <tr class="memitem:rDMA"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rDMA">rDMA</a>   <a class="el" href="gb_2hardware_8h.html#DMA_REG">DMA_REG</a></td></tr>
375 <tr class="separator:rDMA"><td class="memSeparator" colspan="2"> </td></tr>
376 <tr class="memitem:rBGP"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rBGP">rBGP</a>   <a class="el" href="gb_2hardware_8h.html#BGP_REG">BGP_REG</a></td></tr>
377 <tr class="separator:rBGP"><td class="memSeparator" colspan="2"> </td></tr>
378 <tr class="memitem:rOBP0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rOBP0">rOBP0</a>   <a class="el" href="gb_2hardware_8h.html#OBP0_REG">OBP0_REG</a></td></tr>
379 <tr class="separator:rOBP0"><td class="memSeparator" colspan="2"> </td></tr>
380 <tr class="memitem:rOBP1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rOBP1">rOBP1</a>   <a class="el" href="gb_2hardware_8h.html#OBP1_REG">OBP1_REG</a></td></tr>
381 <tr class="separator:rOBP1"><td class="memSeparator" colspan="2"> </td></tr>
382 <tr class="memitem:rWY"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rWY">rWY</a>   <a class="el" href="gb_2hardware_8h.html#WY_REG">WY_REG</a></td></tr>
383 <tr class="separator:rWY"><td class="memSeparator" colspan="2"> </td></tr>
384 <tr class="memitem:rWX"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rWX">rWX</a>   <a class="el" href="gb_2hardware_8h.html#WX_REG">WX_REG</a></td></tr>
385 <tr class="separator:rWX"><td class="memSeparator" colspan="2"> </td></tr>
386 <tr class="memitem:rKEY1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rKEY1">rKEY1</a>   <a class="el" href="gb_2hardware_8h.html#KEY1_REG">KEY1_REG</a></td></tr>
387 <tr class="separator:rKEY1"><td class="memSeparator" colspan="2"> </td></tr>
388 <tr class="memitem:rSPD"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rSPD">rSPD</a>   <a class="el" href="gb_2hardware_8h.html#KEY1_REG">KEY1_REG</a></td></tr>
389 <tr class="separator:rSPD"><td class="memSeparator" colspan="2"> </td></tr>
390 <tr class="memitem:KEY1F_DBLSPEED"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#KEY1F_DBLSPEED">KEY1F_DBLSPEED</a>   0b10000000</td></tr>
391 <tr class="separator:KEY1F_DBLSPEED"><td class="memSeparator" colspan="2"> </td></tr>
392 <tr class="memitem:KEY1F_PREPARE"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#KEY1F_PREPARE">KEY1F_PREPARE</a>   0b00000001</td></tr>
393 <tr class="separator:KEY1F_PREPARE"><td class="memSeparator" colspan="2"> </td></tr>
394 <tr class="memitem:rVBK"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rVBK">rVBK</a>   <a class="el" href="gb_2hardware_8h.html#VBK_REG">VBK_REG</a></td></tr>
395 <tr class="separator:rVBK"><td class="memSeparator" colspan="2"> </td></tr>
396 <tr class="memitem:VBK_BANK_0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#VBK_BANK_0">VBK_BANK_0</a>   0</td></tr>
397 <tr class="separator:VBK_BANK_0"><td class="memSeparator" colspan="2"> </td></tr>
398 <tr class="memitem:VBK_TILES"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#VBK_TILES">VBK_TILES</a>   0</td></tr>
399 <tr class="separator:VBK_TILES"><td class="memSeparator" colspan="2"> </td></tr>
400 <tr class="memitem:VBK_BANK_1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#VBK_BANK_1">VBK_BANK_1</a>   1</td></tr>
401 <tr class="separator:VBK_BANK_1"><td class="memSeparator" colspan="2"> </td></tr>
402 <tr class="memitem:VBK_ATTRIBUTES"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#VBK_ATTRIBUTES">VBK_ATTRIBUTES</a>   1</td></tr>
403 <tr class="separator:VBK_ATTRIBUTES"><td class="memSeparator" colspan="2"> </td></tr>
404 <tr class="memitem:BKGF_PRI"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_PRI">BKGF_PRI</a>   0b10000000</td></tr>
405 <tr class="separator:BKGF_PRI"><td class="memSeparator" colspan="2"> </td></tr>
406 <tr class="memitem:BKGF_YFLIP"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_YFLIP">BKGF_YFLIP</a>   0b01000000</td></tr>
407 <tr class="separator:BKGF_YFLIP"><td class="memSeparator" colspan="2"> </td></tr>
408 <tr class="memitem:BKGF_XFLIP"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_XFLIP">BKGF_XFLIP</a>   0b00100000</td></tr>
409 <tr class="separator:BKGF_XFLIP"><td class="memSeparator" colspan="2"> </td></tr>
410 <tr class="memitem:BKGF_BANK0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_BANK0">BKGF_BANK0</a>   0b00000000</td></tr>
411 <tr class="separator:BKGF_BANK0"><td class="memSeparator" colspan="2"> </td></tr>
412 <tr class="memitem:BKGF_BANK1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_BANK1">BKGF_BANK1</a>   0b00001000</td></tr>
413 <tr class="separator:BKGF_BANK1"><td class="memSeparator" colspan="2"> </td></tr>
414 <tr class="memitem:BKGF_CGB_PAL0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_CGB_PAL0">BKGF_CGB_PAL0</a>   0b00000000</td></tr>
415 <tr class="separator:BKGF_CGB_PAL0"><td class="memSeparator" colspan="2"> </td></tr>
416 <tr class="memitem:BKGF_CGB_PAL1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_CGB_PAL1">BKGF_CGB_PAL1</a>   0b00000001</td></tr>
417 <tr class="separator:BKGF_CGB_PAL1"><td class="memSeparator" colspan="2"> </td></tr>
418 <tr class="memitem:BKGF_CGB_PAL2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_CGB_PAL2">BKGF_CGB_PAL2</a>   0b00000010</td></tr>
419 <tr class="separator:BKGF_CGB_PAL2"><td class="memSeparator" colspan="2"> </td></tr>
420 <tr class="memitem:BKGF_CGB_PAL3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_CGB_PAL3">BKGF_CGB_PAL3</a>   0b00000011</td></tr>
421 <tr class="separator:BKGF_CGB_PAL3"><td class="memSeparator" colspan="2"> </td></tr>
422 <tr class="memitem:BKGF_CGB_PAL4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_CGB_PAL4">BKGF_CGB_PAL4</a>   0b00000100</td></tr>
423 <tr class="separator:BKGF_CGB_PAL4"><td class="memSeparator" colspan="2"> </td></tr>
424 <tr class="memitem:BKGF_CGB_PAL5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_CGB_PAL5">BKGF_CGB_PAL5</a>   0b00000101</td></tr>
425 <tr class="separator:BKGF_CGB_PAL5"><td class="memSeparator" colspan="2"> </td></tr>
426 <tr class="memitem:BKGF_CGB_PAL6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_CGB_PAL6">BKGF_CGB_PAL6</a>   0b00000110</td></tr>
427 <tr class="separator:BKGF_CGB_PAL6"><td class="memSeparator" colspan="2"> </td></tr>
428 <tr class="memitem:BKGF_CGB_PAL7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BKGF_CGB_PAL7">BKGF_CGB_PAL7</a>   0b00000111</td></tr>
429 <tr class="separator:BKGF_CGB_PAL7"><td class="memSeparator" colspan="2"> </td></tr>
430 <tr class="memitem:rHDMA1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rHDMA1">rHDMA1</a>   <a class="el" href="gb_2hardware_8h.html#HDMA1_REG">HDMA1_REG</a></td></tr>
431 <tr class="separator:rHDMA1"><td class="memSeparator" colspan="2"> </td></tr>
432 <tr class="memitem:rHDMA2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rHDMA2">rHDMA2</a>   <a class="el" href="gb_2hardware_8h.html#HDMA2_REG">HDMA2_REG</a></td></tr>
433 <tr class="separator:rHDMA2"><td class="memSeparator" colspan="2"> </td></tr>
434 <tr class="memitem:rHDMA3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rHDMA3">rHDMA3</a>   <a class="el" href="gb_2hardware_8h.html#HDMA3_REG">HDMA3_REG</a></td></tr>
435 <tr class="separator:rHDMA3"><td class="memSeparator" colspan="2"> </td></tr>
436 <tr class="memitem:rHDMA4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rHDMA4">rHDMA4</a>   <a class="el" href="gb_2hardware_8h.html#HDMA4_REG">HDMA4_REG</a></td></tr>
437 <tr class="separator:rHDMA4"><td class="memSeparator" colspan="2"> </td></tr>
438 <tr class="memitem:rHDMA5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rHDMA5">rHDMA5</a>   <a class="el" href="gb_2hardware_8h.html#HDMA5_REG">HDMA5_REG</a></td></tr>
439 <tr class="separator:rHDMA5"><td class="memSeparator" colspan="2"> </td></tr>
440 <tr class="memitem:HDMA5F_MODE_GP"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#HDMA5F_MODE_GP">HDMA5F_MODE_GP</a>   0b00000000</td></tr>
441 <tr class="separator:HDMA5F_MODE_GP"><td class="memSeparator" colspan="2"> </td></tr>
442 <tr class="memitem:HDMA5F_MODE_HBL"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#HDMA5F_MODE_HBL">HDMA5F_MODE_HBL</a>   0b10000000</td></tr>
443 <tr class="separator:HDMA5F_MODE_HBL"><td class="memSeparator" colspan="2"> </td></tr>
444 <tr class="memitem:HDMA5F_BUSY"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#HDMA5F_BUSY">HDMA5F_BUSY</a>   0b10000000</td></tr>
445 <tr class="separator:HDMA5F_BUSY"><td class="memSeparator" colspan="2"> </td></tr>
446 <tr class="memitem:rRP"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rRP">rRP</a>   <a class="el" href="gb_2hardware_8h.html#RP_REG">RP_REG</a></td></tr>
447 <tr class="separator:rRP"><td class="memSeparator" colspan="2"> </td></tr>
448 <tr class="memitem:RPF_ENREAD"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#RPF_ENREAD">RPF_ENREAD</a>   0b11000000</td></tr>
449 <tr class="separator:RPF_ENREAD"><td class="memSeparator" colspan="2"> </td></tr>
450 <tr class="memitem:RPF_DATAIN"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#RPF_DATAIN">RPF_DATAIN</a>   0b00000010</td></tr>
451 <tr class="separator:RPF_DATAIN"><td class="memSeparator" colspan="2"> </td></tr>
452 <tr class="memitem:RPF_WRITE_HI"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#RPF_WRITE_HI">RPF_WRITE_HI</a>   0b00000001</td></tr>
453 <tr class="separator:RPF_WRITE_HI"><td class="memSeparator" colspan="2"> </td></tr>
454 <tr class="memitem:RPF_WRITE_LO"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#RPF_WRITE_LO">RPF_WRITE_LO</a>   0b00000000</td></tr>
455 <tr class="separator:RPF_WRITE_LO"><td class="memSeparator" colspan="2"> </td></tr>
456 <tr class="memitem:rBCPS"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rBCPS">rBCPS</a>   <a class="el" href="gb_2hardware_8h.html#BCPS_REG">BCPS_REG</a></td></tr>
457 <tr class="separator:rBCPS"><td class="memSeparator" colspan="2"> </td></tr>
458 <tr class="memitem:BCPSF_AUTOINC"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BCPSF_AUTOINC">BCPSF_AUTOINC</a>   0b10000000</td></tr>
459 <tr class="separator:BCPSF_AUTOINC"><td class="memSeparator" colspan="2"> </td></tr>
460 <tr class="memitem:rBCPD"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rBCPD">rBCPD</a>   <a class="el" href="gb_2hardware_8h.html#BCPD_REG">BCPD_REG</a></td></tr>
461 <tr class="separator:rBCPD"><td class="memSeparator" colspan="2"> </td></tr>
462 <tr class="memitem:rOCPS"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rOCPS">rOCPS</a>   <a class="el" href="gb_2hardware_8h.html#OCPS_REG">OCPS_REG</a></td></tr>
463 <tr class="separator:rOCPS"><td class="memSeparator" colspan="2"> </td></tr>
464 <tr class="memitem:OCPSF_AUTOINC"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OCPSF_AUTOINC">OCPSF_AUTOINC</a>   0b10000000</td></tr>
465 <tr class="separator:OCPSF_AUTOINC"><td class="memSeparator" colspan="2"> </td></tr>
466 <tr class="memitem:rOCPD"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rOCPD">rOCPD</a>   <a class="el" href="gb_2hardware_8h.html#OCPD_REG">OCPD_REG</a></td></tr>
467 <tr class="separator:rOCPD"><td class="memSeparator" colspan="2"> </td></tr>
468 <tr class="memitem:rSVBK"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rSVBK">rSVBK</a>   <a class="el" href="gb_2hardware_8h.html#SVBK_REG">SVBK_REG</a></td></tr>
469 <tr class="separator:rSVBK"><td class="memSeparator" colspan="2"> </td></tr>
470 <tr class="memitem:rSMBK"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rSMBK">rSMBK</a>   <a class="el" href="gb_2hardware_8h.html#SVBK_REG">SVBK_REG</a></td></tr>
471 <tr class="separator:rSMBK"><td class="memSeparator" colspan="2"> </td></tr>
472 <tr class="memitem:rPCM12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rPCM12">rPCM12</a>   <a class="el" href="gb_2hardware_8h.html#PCM12_REG">PCM12_REG</a></td></tr>
473 <tr class="separator:rPCM12"><td class="memSeparator" colspan="2"> </td></tr>
474 <tr class="memitem:rPCM34"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rPCM34">rPCM34</a>   <a class="el" href="gb_2hardware_8h.html#PCM34_REG">PCM34_REG</a></td></tr>
475 <tr class="separator:rPCM34"><td class="memSeparator" colspan="2"> </td></tr>
476 <tr class="memitem:rIE"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rIE">rIE</a>   <a class="el" href="gb_2hardware_8h.html#IE_REG">IE_REG</a></td></tr>
477 <tr class="separator:rIE"><td class="memSeparator" colspan="2"> </td></tr>
478 <tr class="memitem:IEF_HILO"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#IEF_HILO">IEF_HILO</a>   0b00010000</td></tr>
479 <tr class="separator:IEF_HILO"><td class="memSeparator" colspan="2"> </td></tr>
480 <tr class="memitem:IEF_SERIAL"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#IEF_SERIAL">IEF_SERIAL</a>   0b00001000</td></tr>
481 <tr class="separator:IEF_SERIAL"><td class="memSeparator" colspan="2"> </td></tr>
482 <tr class="memitem:IEF_TIMER"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#IEF_TIMER">IEF_TIMER</a>   0b00000100</td></tr>
483 <tr class="separator:IEF_TIMER"><td class="memSeparator" colspan="2"> </td></tr>
484 <tr class="memitem:IEF_STAT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#IEF_STAT">IEF_STAT</a>   0b00000010</td></tr>
485 <tr class="separator:IEF_STAT"><td class="memSeparator" colspan="2"> </td></tr>
486 <tr class="memitem:IEF_VBLANK"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#IEF_VBLANK">IEF_VBLANK</a>   0b00000001</td></tr>
487 <tr class="separator:IEF_VBLANK"><td class="memSeparator" colspan="2"> </td></tr>
488 <tr class="memitem:AUDLEN_DUTY_12_5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDLEN_DUTY_12_5">AUDLEN_DUTY_12_5</a>   0b00000000</td></tr>
489 <tr class="separator:AUDLEN_DUTY_12_5"><td class="memSeparator" colspan="2"> </td></tr>
490 <tr class="memitem:AUDLEN_DUTY_25"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDLEN_DUTY_25">AUDLEN_DUTY_25</a>   0b01000000</td></tr>
491 <tr class="separator:AUDLEN_DUTY_25"><td class="memSeparator" colspan="2"> </td></tr>
492 <tr class="memitem:AUDLEN_DUTY_50"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDLEN_DUTY_50">AUDLEN_DUTY_50</a>   0b10000000</td></tr>
493 <tr class="separator:AUDLEN_DUTY_50"><td class="memSeparator" colspan="2"> </td></tr>
494 <tr class="memitem:AUDLEN_DUTY_75"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDLEN_DUTY_75">AUDLEN_DUTY_75</a>   0b11000000</td></tr>
495 <tr class="separator:AUDLEN_DUTY_75"><td class="memSeparator" colspan="2"> </td></tr>
496 <tr class="memitem:AUDLEN_LENGTH"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDLEN_LENGTH">AUDLEN_LENGTH</a>(x)   (x)</td></tr>
497 <tr class="separator:AUDLEN_LENGTH"><td class="memSeparator" colspan="2"> </td></tr>
498 <tr class="memitem:AUDENV_VOL"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDENV_VOL">AUDENV_VOL</a>(x)   ((x) << 4)</td></tr>
499 <tr class="separator:AUDENV_VOL"><td class="memSeparator" colspan="2"> </td></tr>
500 <tr class="memitem:AUDENV_UP"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDENV_UP">AUDENV_UP</a>   0b00001000</td></tr>
501 <tr class="separator:AUDENV_UP"><td class="memSeparator" colspan="2"> </td></tr>
502 <tr class="memitem:AUDENV_DOWN"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDENV_DOWN">AUDENV_DOWN</a>   0b00000000</td></tr>
503 <tr class="separator:AUDENV_DOWN"><td class="memSeparator" colspan="2"> </td></tr>
504 <tr class="memitem:AUDENV_LENGTH"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDENV_LENGTH">AUDENV_LENGTH</a>(x)   (x)</td></tr>
505 <tr class="separator:AUDENV_LENGTH"><td class="memSeparator" colspan="2"> </td></tr>
506 <tr class="memitem:AUDHIGH_RESTART"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDHIGH_RESTART">AUDHIGH_RESTART</a>   0b10000000</td></tr>
507 <tr class="separator:AUDHIGH_RESTART"><td class="memSeparator" colspan="2"> </td></tr>
508 <tr class="memitem:AUDHIGH_LENGTH_ON"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDHIGH_LENGTH_ON">AUDHIGH_LENGTH_ON</a>   0b01000000</td></tr>
509 <tr class="separator:AUDHIGH_LENGTH_ON"><td class="memSeparator" colspan="2"> </td></tr>
510 <tr class="memitem:AUDHIGH_LENGTH_OFF"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUDHIGH_LENGTH_OFF">AUDHIGH_LENGTH_OFF</a>   0b00000000</td></tr>
511 <tr class="separator:AUDHIGH_LENGTH_OFF"><td class="memSeparator" colspan="2"> </td></tr>
512 <tr class="memitem:OAMF_PRI"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_PRI">OAMF_PRI</a>   0b10000000</td></tr>
513 <tr class="separator:OAMF_PRI"><td class="memSeparator" colspan="2"> </td></tr>
514 <tr class="memitem:OAMF_YFLIP"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_YFLIP">OAMF_YFLIP</a>   0b01000000</td></tr>
515 <tr class="separator:OAMF_YFLIP"><td class="memSeparator" colspan="2"> </td></tr>
516 <tr class="memitem:OAMF_XFLIP"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_XFLIP">OAMF_XFLIP</a>   0b00100000</td></tr>
517 <tr class="separator:OAMF_XFLIP"><td class="memSeparator" colspan="2"> </td></tr>
518 <tr class="memitem:OAMF_PAL0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_PAL0">OAMF_PAL0</a>   0b00000000</td></tr>
519 <tr class="separator:OAMF_PAL0"><td class="memSeparator" colspan="2"> </td></tr>
520 <tr class="memitem:OAMF_PAL1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_PAL1">OAMF_PAL1</a>   0b00010000</td></tr>
521 <tr class="separator:OAMF_PAL1"><td class="memSeparator" colspan="2"> </td></tr>
522 <tr class="memitem:OAMF_BANK0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_BANK0">OAMF_BANK0</a>   0b00000000</td></tr>
523 <tr class="separator:OAMF_BANK0"><td class="memSeparator" colspan="2"> </td></tr>
524 <tr class="memitem:OAMF_BANK1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_BANK1">OAMF_BANK1</a>   0b00001000</td></tr>
525 <tr class="separator:OAMF_BANK1"><td class="memSeparator" colspan="2"> </td></tr>
526 <tr class="memitem:OAMF_CGB_PAL0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_CGB_PAL0">OAMF_CGB_PAL0</a>   0b00000000</td></tr>
527 <tr class="separator:OAMF_CGB_PAL0"><td class="memSeparator" colspan="2"> </td></tr>
528 <tr class="memitem:OAMF_CGB_PAL1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_CGB_PAL1">OAMF_CGB_PAL1</a>   0b00000001</td></tr>
529 <tr class="separator:OAMF_CGB_PAL1"><td class="memSeparator" colspan="2"> </td></tr>
530 <tr class="memitem:OAMF_CGB_PAL2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_CGB_PAL2">OAMF_CGB_PAL2</a>   0b00000010</td></tr>
531 <tr class="separator:OAMF_CGB_PAL2"><td class="memSeparator" colspan="2"> </td></tr>
532 <tr class="memitem:OAMF_CGB_PAL3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_CGB_PAL3">OAMF_CGB_PAL3</a>   0b00000011</td></tr>
533 <tr class="separator:OAMF_CGB_PAL3"><td class="memSeparator" colspan="2"> </td></tr>
534 <tr class="memitem:OAMF_CGB_PAL4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_CGB_PAL4">OAMF_CGB_PAL4</a>   0b00000100</td></tr>
535 <tr class="separator:OAMF_CGB_PAL4"><td class="memSeparator" colspan="2"> </td></tr>
536 <tr class="memitem:OAMF_CGB_PAL5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_CGB_PAL5">OAMF_CGB_PAL5</a>   0b00000101</td></tr>
537 <tr class="separator:OAMF_CGB_PAL5"><td class="memSeparator" colspan="2"> </td></tr>
538 <tr class="memitem:OAMF_CGB_PAL6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_CGB_PAL6">OAMF_CGB_PAL6</a>   0b00000110</td></tr>
539 <tr class="separator:OAMF_CGB_PAL6"><td class="memSeparator" colspan="2"> </td></tr>
540 <tr class="memitem:OAMF_CGB_PAL7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_CGB_PAL7">OAMF_CGB_PAL7</a>   0b00000111</td></tr>
541 <tr class="separator:OAMF_CGB_PAL7"><td class="memSeparator" colspan="2"> </td></tr>
542 <tr class="memitem:OAMF_PALMASK"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OAMF_PALMASK">OAMF_PALMASK</a>   0b00000111</td></tr>
543 <tr class="separator:OAMF_PALMASK"><td class="memSeparator" colspan="2"> </td></tr>
544 <tr class="memitem:DEVICE_SCREEN_X_OFFSET"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_SCREEN_X_OFFSET">DEVICE_SCREEN_X_OFFSET</a>   0</td></tr>
545 <tr class="separator:DEVICE_SCREEN_X_OFFSET"><td class="memSeparator" colspan="2"> </td></tr>
546 <tr class="memitem:DEVICE_SCREEN_Y_OFFSET"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_SCREEN_Y_OFFSET">DEVICE_SCREEN_Y_OFFSET</a>   0</td></tr>
547 <tr class="separator:DEVICE_SCREEN_Y_OFFSET"><td class="memSeparator" colspan="2"> </td></tr>
548 <tr class="memitem:DEVICE_SCREEN_WIDTH"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_SCREEN_WIDTH">DEVICE_SCREEN_WIDTH</a>   20</td></tr>
549 <tr class="separator:DEVICE_SCREEN_WIDTH"><td class="memSeparator" colspan="2"> </td></tr>
550 <tr class="memitem:DEVICE_SCREEN_HEIGHT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_SCREEN_HEIGHT">DEVICE_SCREEN_HEIGHT</a>   18</td></tr>
551 <tr class="separator:DEVICE_SCREEN_HEIGHT"><td class="memSeparator" colspan="2"> </td></tr>
552 <tr class="memitem:DEVICE_SCREEN_BUFFER_WIDTH"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_SCREEN_BUFFER_WIDTH">DEVICE_SCREEN_BUFFER_WIDTH</a>   32</td></tr>
553 <tr class="separator:DEVICE_SCREEN_BUFFER_WIDTH"><td class="memSeparator" colspan="2"> </td></tr>
554 <tr class="memitem:DEVICE_SCREEN_BUFFER_HEIGHT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_SCREEN_BUFFER_HEIGHT">DEVICE_SCREEN_BUFFER_HEIGHT</a>   32</td></tr>
555 <tr class="separator:DEVICE_SCREEN_BUFFER_HEIGHT"><td class="memSeparator" colspan="2"> </td></tr>
556 <tr class="memitem:DEVICE_SCREEN_MAP_ENTRY_SIZE"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_SCREEN_MAP_ENTRY_SIZE">DEVICE_SCREEN_MAP_ENTRY_SIZE</a>   1</td></tr>
557 <tr class="separator:DEVICE_SCREEN_MAP_ENTRY_SIZE"><td class="memSeparator" colspan="2"> </td></tr>
558 <tr class="memitem:DEVICE_SPRITE_PX_OFFSET_X"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_SPRITE_PX_OFFSET_X">DEVICE_SPRITE_PX_OFFSET_X</a>   8</td></tr>
559 <tr class="separator:DEVICE_SPRITE_PX_OFFSET_X"><td class="memSeparator" colspan="2"> </td></tr>
560 <tr class="memitem:DEVICE_SPRITE_PX_OFFSET_Y"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_SPRITE_PX_OFFSET_Y">DEVICE_SPRITE_PX_OFFSET_Y</a>   16</td></tr>
561 <tr class="separator:DEVICE_SPRITE_PX_OFFSET_Y"><td class="memSeparator" colspan="2"> </td></tr>
562 <tr class="memitem:DEVICE_WINDOW_PX_OFFSET_X"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_WINDOW_PX_OFFSET_X">DEVICE_WINDOW_PX_OFFSET_X</a>   7</td></tr>
563 <tr class="separator:DEVICE_WINDOW_PX_OFFSET_X"><td class="memSeparator" colspan="2"> </td></tr>
564 <tr class="memitem:DEVICE_WINDOW_PX_OFFSET_Y"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_WINDOW_PX_OFFSET_Y">DEVICE_WINDOW_PX_OFFSET_Y</a>   0</td></tr>
565 <tr class="separator:DEVICE_WINDOW_PX_OFFSET_Y"><td class="memSeparator" colspan="2"> </td></tr>
566 <tr class="memitem:DEVICE_SCREEN_PX_WIDTH"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_SCREEN_PX_WIDTH">DEVICE_SCREEN_PX_WIDTH</a>   (<a class="el" href="nes_2hardware_8h.html#DEVICE_SCREEN_WIDTH">DEVICE_SCREEN_WIDTH</a> * 8)</td></tr>
567 <tr class="separator:DEVICE_SCREEN_PX_WIDTH"><td class="memSeparator" colspan="2"> </td></tr>
568 <tr class="memitem:DEVICE_SCREEN_PX_HEIGHT"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DEVICE_SCREEN_PX_HEIGHT">DEVICE_SCREEN_PX_HEIGHT</a>   (<a class="el" href="nes_2hardware_8h.html#DEVICE_SCREEN_HEIGHT">DEVICE_SCREEN_HEIGHT</a> * 8)</td></tr>
569 <tr class="separator:DEVICE_SCREEN_PX_HEIGHT"><td class="memSeparator" colspan="2"> </td></tr>
570 </table><table class="memberdecls">
571 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="var-members" name="var-members"></a>
572 Variables</h2></td></tr>
573 <tr class="memitem:_VRAM"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_VRAM">_VRAM</a> []</td></tr>
574 <tr class="separator:_VRAM"><td class="memSeparator" colspan="2"> </td></tr>
575 <tr class="memitem:_VRAM8000"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_VRAM8000">_VRAM8000</a> []</td></tr>
576 <tr class="separator:_VRAM8000"><td class="memSeparator" colspan="2"> </td></tr>
577 <tr class="memitem:_VRAM8800"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_VRAM8800">_VRAM8800</a> []</td></tr>
578 <tr class="separator:_VRAM8800"><td class="memSeparator" colspan="2"> </td></tr>
579 <tr class="memitem:_VRAM9000"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_VRAM9000">_VRAM9000</a> []</td></tr>
580 <tr class="separator:_VRAM9000"><td class="memSeparator" colspan="2"> </td></tr>
581 <tr class="memitem:_SCRN0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_SCRN0">_SCRN0</a> []</td></tr>
582 <tr class="separator:_SCRN0"><td class="memSeparator" colspan="2"> </td></tr>
583 <tr class="memitem:_SCRN1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_SCRN1">_SCRN1</a> []</td></tr>
584 <tr class="separator:_SCRN1"><td class="memSeparator" colspan="2"> </td></tr>
585 <tr class="memitem:_SRAM"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_SRAM">_SRAM</a> []</td></tr>
586 <tr class="separator:_SRAM"><td class="memSeparator" colspan="2"> </td></tr>
587 <tr class="memitem:_RAM"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_RAM">_RAM</a> []</td></tr>
588 <tr class="separator:_RAM"><td class="memSeparator" colspan="2"> </td></tr>
589 <tr class="memitem:_RAMBANK"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_RAMBANK">_RAMBANK</a> []</td></tr>
590 <tr class="separator:_RAMBANK"><td class="memSeparator" colspan="2"> </td></tr>
591 <tr class="memitem:_OAMRAM"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_OAMRAM">_OAMRAM</a> []</td></tr>
592 <tr class="separator:_OAMRAM"><td class="memSeparator" colspan="2"> </td></tr>
593 <tr class="memitem:_IO"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_IO">_IO</a> []</td></tr>
594 <tr class="separator:_IO"><td class="memSeparator" colspan="2"> </td></tr>
595 <tr class="memitem:_AUD3WAVERAM"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_AUD3WAVERAM">_AUD3WAVERAM</a> []</td></tr>
596 <tr class="separator:_AUD3WAVERAM"><td class="memSeparator" colspan="2"> </td></tr>
597 <tr class="memitem:_HRAM"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#_HRAM">_HRAM</a> []</td></tr>
598 <tr class="separator:_HRAM"><td class="memSeparator" colspan="2"> </td></tr>
599 <tr class="memitem:rRAMG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rRAMG">rRAMG</a></td></tr>
600 <tr class="separator:rRAMG"><td class="memSeparator" colspan="2"> </td></tr>
601 <tr class="memitem:rROMB0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rROMB0">rROMB0</a></td></tr>
602 <tr class="separator:rROMB0"><td class="memSeparator" colspan="2"> </td></tr>
603 <tr class="memitem:rROMB1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rROMB1">rROMB1</a></td></tr>
604 <tr class="separator:rROMB1"><td class="memSeparator" colspan="2"> </td></tr>
605 <tr class="memitem:rRAMB"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rRAMB">rRAMB</a></td></tr>
606 <tr class="separator:rRAMB"><td class="memSeparator" colspan="2"> </td></tr>
607 <tr class="memitem:rMBC7_SRAM_ENABLE_1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rMBC7_SRAM_ENABLE_1">rMBC7_SRAM_ENABLE_1</a></td></tr>
608 <tr class="separator:rMBC7_SRAM_ENABLE_1"><td class="memSeparator" colspan="2"> </td></tr>
609 <tr class="memitem:rMBC7_SRAM_ENABLE_2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rMBC7_SRAM_ENABLE_2">rMBC7_SRAM_ENABLE_2</a></td></tr>
610 <tr class="separator:rMBC7_SRAM_ENABLE_2"><td class="memSeparator" colspan="2"> </td></tr>
611 <tr class="memitem:rMBC7_LATCH_1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rMBC7_LATCH_1">rMBC7_LATCH_1</a></td></tr>
612 <tr class="separator:rMBC7_LATCH_1"><td class="memSeparator" colspan="2"> </td></tr>
613 <tr class="memitem:rMBC7_LATCH_2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rMBC7_LATCH_2">rMBC7_LATCH_2</a></td></tr>
614 <tr class="separator:rMBC7_LATCH_2"><td class="memSeparator" colspan="2"> </td></tr>
615 <tr class="memitem:rMBC7_ACCEL_X_LO"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rMBC7_ACCEL_X_LO">rMBC7_ACCEL_X_LO</a></td></tr>
616 <tr class="separator:rMBC7_ACCEL_X_LO"><td class="memSeparator" colspan="2"> </td></tr>
617 <tr class="memitem:rMBC7_ACCEL_X_HI"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rMBC7_ACCEL_X_HI">rMBC7_ACCEL_X_HI</a></td></tr>
618 <tr class="separator:rMBC7_ACCEL_X_HI"><td class="memSeparator" colspan="2"> </td></tr>
619 <tr class="memitem:rMBC7_ACCEL_Y_LO"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rMBC7_ACCEL_Y_LO">rMBC7_ACCEL_Y_LO</a></td></tr>
620 <tr class="separator:rMBC7_ACCEL_Y_LO"><td class="memSeparator" colspan="2"> </td></tr>
621 <tr class="memitem:rMBC7_ACCEL_Y_HI"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#rMBC7_ACCEL_Y_HI">rMBC7_ACCEL_Y_HI</a></td></tr>
622 <tr class="separator:rMBC7_ACCEL_Y_HI"><td class="memSeparator" colspan="2"> </td></tr>
623 <tr class="memitem:P1_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#P1_REG">P1_REG</a></td></tr>
624 <tr class="separator:P1_REG"><td class="memSeparator" colspan="2"> </td></tr>
625 <tr class="memitem:SB_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SB_REG">SB_REG</a></td></tr>
626 <tr class="separator:SB_REG"><td class="memSeparator" colspan="2"> </td></tr>
627 <tr class="memitem:SC_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SC_REG">SC_REG</a></td></tr>
628 <tr class="separator:SC_REG"><td class="memSeparator" colspan="2"> </td></tr>
629 <tr class="memitem:DIV_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DIV_REG">DIV_REG</a></td></tr>
630 <tr class="separator:DIV_REG"><td class="memSeparator" colspan="2"> </td></tr>
631 <tr class="memitem:TIMA_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#TIMA_REG">TIMA_REG</a></td></tr>
632 <tr class="separator:TIMA_REG"><td class="memSeparator" colspan="2"> </td></tr>
633 <tr class="memitem:TMA_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#TMA_REG">TMA_REG</a></td></tr>
634 <tr class="separator:TMA_REG"><td class="memSeparator" colspan="2"> </td></tr>
635 <tr class="memitem:TAC_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#TAC_REG">TAC_REG</a></td></tr>
636 <tr class="separator:TAC_REG"><td class="memSeparator" colspan="2"> </td></tr>
637 <tr class="memitem:IF_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#IF_REG">IF_REG</a></td></tr>
638 <tr class="separator:IF_REG"><td class="memSeparator" colspan="2"> </td></tr>
639 <tr class="memitem:NR10_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR10_REG">NR10_REG</a></td></tr>
640 <tr class="separator:NR10_REG"><td class="memSeparator" colspan="2"> </td></tr>
641 <tr class="memitem:NR11_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR11_REG">NR11_REG</a></td></tr>
642 <tr class="separator:NR11_REG"><td class="memSeparator" colspan="2"> </td></tr>
643 <tr class="memitem:NR12_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR12_REG">NR12_REG</a></td></tr>
644 <tr class="separator:NR12_REG"><td class="memSeparator" colspan="2"> </td></tr>
645 <tr class="memitem:NR13_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR13_REG">NR13_REG</a></td></tr>
646 <tr class="separator:NR13_REG"><td class="memSeparator" colspan="2"> </td></tr>
647 <tr class="memitem:NR14_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR14_REG">NR14_REG</a></td></tr>
648 <tr class="separator:NR14_REG"><td class="memSeparator" colspan="2"> </td></tr>
649 <tr class="memitem:NR21_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR21_REG">NR21_REG</a></td></tr>
650 <tr class="separator:NR21_REG"><td class="memSeparator" colspan="2"> </td></tr>
651 <tr class="memitem:NR22_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR22_REG">NR22_REG</a></td></tr>
652 <tr class="separator:NR22_REG"><td class="memSeparator" colspan="2"> </td></tr>
653 <tr class="memitem:NR23_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR23_REG">NR23_REG</a></td></tr>
654 <tr class="separator:NR23_REG"><td class="memSeparator" colspan="2"> </td></tr>
655 <tr class="memitem:NR24_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR24_REG">NR24_REG</a></td></tr>
656 <tr class="separator:NR24_REG"><td class="memSeparator" colspan="2"> </td></tr>
657 <tr class="memitem:NR30_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR30_REG">NR30_REG</a></td></tr>
658 <tr class="separator:NR30_REG"><td class="memSeparator" colspan="2"> </td></tr>
659 <tr class="memitem:NR31_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR31_REG">NR31_REG</a></td></tr>
660 <tr class="separator:NR31_REG"><td class="memSeparator" colspan="2"> </td></tr>
661 <tr class="memitem:NR32_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR32_REG">NR32_REG</a></td></tr>
662 <tr class="separator:NR32_REG"><td class="memSeparator" colspan="2"> </td></tr>
663 <tr class="memitem:NR33_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR33_REG">NR33_REG</a></td></tr>
664 <tr class="separator:NR33_REG"><td class="memSeparator" colspan="2"> </td></tr>
665 <tr class="memitem:NR34_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR34_REG">NR34_REG</a></td></tr>
666 <tr class="separator:NR34_REG"><td class="memSeparator" colspan="2"> </td></tr>
667 <tr class="memitem:NR41_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR41_REG">NR41_REG</a></td></tr>
668 <tr class="separator:NR41_REG"><td class="memSeparator" colspan="2"> </td></tr>
669 <tr class="memitem:NR42_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR42_REG">NR42_REG</a></td></tr>
670 <tr class="separator:NR42_REG"><td class="memSeparator" colspan="2"> </td></tr>
671 <tr class="memitem:NR43_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR43_REG">NR43_REG</a></td></tr>
672 <tr class="separator:NR43_REG"><td class="memSeparator" colspan="2"> </td></tr>
673 <tr class="memitem:NR44_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR44_REG">NR44_REG</a></td></tr>
674 <tr class="separator:NR44_REG"><td class="memSeparator" colspan="2"> </td></tr>
675 <tr class="memitem:NR50_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR50_REG">NR50_REG</a></td></tr>
676 <tr class="separator:NR50_REG"><td class="memSeparator" colspan="2"> </td></tr>
677 <tr class="memitem:NR51_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR51_REG">NR51_REG</a></td></tr>
678 <tr class="separator:NR51_REG"><td class="memSeparator" colspan="2"> </td></tr>
679 <tr class="memitem:NR52_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#NR52_REG">NR52_REG</a></td></tr>
680 <tr class="separator:NR52_REG"><td class="memSeparator" colspan="2"> </td></tr>
681 <tr class="memitem:AUD3WAVE"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#AUD3WAVE">AUD3WAVE</a> [16]</td></tr>
682 <tr class="separator:AUD3WAVE"><td class="memSeparator" colspan="2"> </td></tr>
683 <tr class="memitem:PCM_SAMPLE"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#PCM_SAMPLE">PCM_SAMPLE</a> [16]</td></tr>
684 <tr class="separator:PCM_SAMPLE"><td class="memSeparator" colspan="2"> </td></tr>
685 <tr class="memitem:LCDC_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LCDC_REG">LCDC_REG</a></td></tr>
686 <tr class="separator:LCDC_REG"><td class="memSeparator" colspan="2"> </td></tr>
687 <tr class="memitem:STAT_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#STAT_REG">STAT_REG</a></td></tr>
688 <tr class="separator:STAT_REG"><td class="memSeparator" colspan="2"> </td></tr>
689 <tr class="memitem:SCY_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SCY_REG">SCY_REG</a></td></tr>
690 <tr class="separator:SCY_REG"><td class="memSeparator" colspan="2"> </td></tr>
691 <tr class="memitem:SCX_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SCX_REG">SCX_REG</a></td></tr>
692 <tr class="separator:SCX_REG"><td class="memSeparator" colspan="2"> </td></tr>
693 <tr class="memitem:LY_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LY_REG">LY_REG</a></td></tr>
694 <tr class="separator:LY_REG"><td class="memSeparator" colspan="2"> </td></tr>
695 <tr class="memitem:LYC_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#LYC_REG">LYC_REG</a></td></tr>
696 <tr class="separator:LYC_REG"><td class="memSeparator" colspan="2"> </td></tr>
697 <tr class="memitem:DMA_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#DMA_REG">DMA_REG</a></td></tr>
698 <tr class="separator:DMA_REG"><td class="memSeparator" colspan="2"> </td></tr>
699 <tr class="memitem:BGP_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BGP_REG">BGP_REG</a></td></tr>
700 <tr class="separator:BGP_REG"><td class="memSeparator" colspan="2"> </td></tr>
701 <tr class="memitem:OBP0_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OBP0_REG">OBP0_REG</a></td></tr>
702 <tr class="separator:OBP0_REG"><td class="memSeparator" colspan="2"> </td></tr>
703 <tr class="memitem:OBP1_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OBP1_REG">OBP1_REG</a></td></tr>
704 <tr class="separator:OBP1_REG"><td class="memSeparator" colspan="2"> </td></tr>
705 <tr class="memitem:WY_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#WY_REG">WY_REG</a></td></tr>
706 <tr class="separator:WY_REG"><td class="memSeparator" colspan="2"> </td></tr>
707 <tr class="memitem:WX_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#WX_REG">WX_REG</a></td></tr>
708 <tr class="separator:WX_REG"><td class="memSeparator" colspan="2"> </td></tr>
709 <tr class="memitem:KEY1_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#KEY1_REG">KEY1_REG</a></td></tr>
710 <tr class="separator:KEY1_REG"><td class="memSeparator" colspan="2"> </td></tr>
711 <tr class="memitem:VBK_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#VBK_REG">VBK_REG</a></td></tr>
712 <tr class="separator:VBK_REG"><td class="memSeparator" colspan="2"> </td></tr>
713 <tr class="memitem:HDMA1_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#HDMA1_REG">HDMA1_REG</a></td></tr>
714 <tr class="separator:HDMA1_REG"><td class="memSeparator" colspan="2"> </td></tr>
715 <tr class="memitem:HDMA2_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#HDMA2_REG">HDMA2_REG</a></td></tr>
716 <tr class="separator:HDMA2_REG"><td class="memSeparator" colspan="2"> </td></tr>
717 <tr class="memitem:HDMA3_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#HDMA3_REG">HDMA3_REG</a></td></tr>
718 <tr class="separator:HDMA3_REG"><td class="memSeparator" colspan="2"> </td></tr>
719 <tr class="memitem:HDMA4_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#HDMA4_REG">HDMA4_REG</a></td></tr>
720 <tr class="separator:HDMA4_REG"><td class="memSeparator" colspan="2"> </td></tr>
721 <tr class="memitem:HDMA5_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#HDMA5_REG">HDMA5_REG</a></td></tr>
722 <tr class="separator:HDMA5_REG"><td class="memSeparator" colspan="2"> </td></tr>
723 <tr class="memitem:RP_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#RP_REG">RP_REG</a></td></tr>
724 <tr class="separator:RP_REG"><td class="memSeparator" colspan="2"> </td></tr>
725 <tr class="memitem:BCPS_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BCPS_REG">BCPS_REG</a></td></tr>
726 <tr class="separator:BCPS_REG"><td class="memSeparator" colspan="2"> </td></tr>
727 <tr class="memitem:BCPD_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#BCPD_REG">BCPD_REG</a></td></tr>
728 <tr class="separator:BCPD_REG"><td class="memSeparator" colspan="2"> </td></tr>
729 <tr class="memitem:OCPS_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OCPS_REG">OCPS_REG</a></td></tr>
730 <tr class="separator:OCPS_REG"><td class="memSeparator" colspan="2"> </td></tr>
731 <tr class="memitem:OCPD_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#OCPD_REG">OCPD_REG</a></td></tr>
732 <tr class="separator:OCPD_REG"><td class="memSeparator" colspan="2"> </td></tr>
733 <tr class="memitem:SVBK_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#SVBK_REG">SVBK_REG</a></td></tr>
734 <tr class="separator:SVBK_REG"><td class="memSeparator" colspan="2"> </td></tr>
735 <tr class="memitem:PCM12_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#PCM12_REG">PCM12_REG</a></td></tr>
736 <tr class="separator:PCM12_REG"><td class="memSeparator" colspan="2"> </td></tr>
737 <tr class="memitem:PCM34_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#PCM34_REG">PCM34_REG</a></td></tr>
738 <tr class="separator:PCM34_REG"><td class="memSeparator" colspan="2"> </td></tr>
739 <tr class="memitem:IE_REG"><td class="memItemLeft" align="right" valign="top"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="gb_2hardware_8h.html#IE_REG">IE_REG</a></td></tr>
740 <tr class="separator:IE_REG"><td class="memSeparator" colspan="2"> </td></tr>
741 </table>
742 <a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
743 <div class="textblock"><p >Defines that let the GB's hardware registers be accessed from C.</p>
744 <p >See the <a class="el" href="docs_links_and_tools.html#Pandocs">Pandocs</a> for more details on each register. </p>
745 </div><h2 class="groupheader">Macro Definition Documentation</h2>
746 <a id="__BYTES" name="__BYTES"></a>
747 <h2 class="memtitle"><span class="permalink"><a href="#__BYTES">◆ </a></span>__BYTES</h2>
748
749 <div class="memitem">
750 <div class="memproto">
751 <table class="memname">
752 <tr>
753 <td class="memname">#define __BYTES   extern <a class="el" href="asm_2types_8h.html#UBYTE">UBYTE</a></td>
754 </tr>
755 </table>
756 </div><div class="memdoc">
757
758 </div>
759 </div>
760 <a id="__BYTE_REG" name="__BYTE_REG"></a>
761 <h2 class="memtitle"><span class="permalink"><a href="#__BYTE_REG">◆ </a></span>__BYTE_REG</h2>
762
763 <div class="memitem">
764 <div class="memproto">
765 <table class="memname">
766 <tr>
767 <td class="memname">#define __BYTE_REG   extern volatile <a class="el" href="asm_2types_8h.html#UBYTE">UBYTE</a></td>
768 </tr>
769 </table>
770 </div><div class="memdoc">
771
772 </div>
773 </div>
774 <a id="__REG" name="__REG"></a>
775 <h2 class="memtitle"><span class="permalink"><a href="#__REG">◆ </a></span>__REG</h2>
776
777 <div class="memitem">
778 <div class="memproto">
779 <table class="memname">
780 <tr>
781 <td class="memname">#define __REG   extern volatile <a class="el" href="asm_2types_8h.html#SFR">SFR</a></td>
782 </tr>
783 </table>
784 </div><div class="memdoc">
785
786 </div>
787 </div>
788 <a id="MBC7_LATCH_ERASE" name="MBC7_LATCH_ERASE"></a>
789 <h2 class="memtitle"><span class="permalink"><a href="#MBC7_LATCH_ERASE">◆ </a></span>MBC7_LATCH_ERASE</h2>
790
791 <div class="memitem">
792 <div class="memproto">
793 <table class="memname">
794 <tr>
795 <td class="memname">#define MBC7_LATCH_ERASE   0x55u</td>
796 </tr>
797 </table>
798 </div><div class="memdoc">
799
800 </div>
801 </div>
802 <a id="MBC7_LATCH_CAPTURE" name="MBC7_LATCH_CAPTURE"></a>
803 <h2 class="memtitle"><span class="permalink"><a href="#MBC7_LATCH_CAPTURE">◆ </a></span>MBC7_LATCH_CAPTURE</h2>
804
805 <div class="memitem">
806 <div class="memproto">
807 <table class="memname">
808 <tr>
809 <td class="memname">#define MBC7_LATCH_CAPTURE   0xAAu</td>
810 </tr>
811 </table>
812 </div><div class="memdoc">
813
814 </div>
815 </div>
816 <a id="MBC7_SRAM_ENABLE_KEY_1" name="MBC7_SRAM_ENABLE_KEY_1"></a>
817 <h2 class="memtitle"><span class="permalink"><a href="#MBC7_SRAM_ENABLE_KEY_1">◆ </a></span>MBC7_SRAM_ENABLE_KEY_1</h2>
818
819 <div class="memitem">
820 <div class="memproto">
821 <table class="memname">
822 <tr>
823 <td class="memname">#define MBC7_SRAM_ENABLE_KEY_1   0x0Au</td>
824 </tr>
825 </table>
826 </div><div class="memdoc">
827
828 </div>
829 </div>
830 <a id="MBC7_SRAM_ENABLE_KEY_2" name="MBC7_SRAM_ENABLE_KEY_2"></a>
831 <h2 class="memtitle"><span class="permalink"><a href="#MBC7_SRAM_ENABLE_KEY_2">◆ </a></span>MBC7_SRAM_ENABLE_KEY_2</h2>
832
833 <div class="memitem">
834 <div class="memproto">
835 <table class="memname">
836 <tr>
837 <td class="memname">#define MBC7_SRAM_ENABLE_KEY_2   0x40u</td>
838 </tr>
839 </table>
840 </div><div class="memdoc">
841
842 </div>
843 </div>
844 <a id="rP1" name="rP1"></a>
845 <h2 class="memtitle"><span class="permalink"><a href="#rP1">◆ </a></span>rP1</h2>
846
847 <div class="memitem">
848 <div class="memproto">
849 <table class="memname">
850 <tr>
851 <td class="memname">#define rP1   <a class="el" href="gb_2hardware_8h.html#P1_REG">P1_REG</a></td>
852 </tr>
853 </table>
854 </div><div class="memdoc">
855
856 </div>
857 </div>
858 <a id="P1F_5" name="P1F_5"></a>
859 <h2 class="memtitle"><span class="permalink"><a href="#P1F_5">◆ </a></span>P1F_5</h2>
860
861 <div class="memitem">
862 <div class="memproto">
863 <table class="memname">
864 <tr>
865 <td class="memname">#define P1F_5   0b00100000</td>
866 </tr>
867 </table>
868 </div><div class="memdoc">
869
870 </div>
871 </div>
872 <a id="P1F_4" name="P1F_4"></a>
873 <h2 class="memtitle"><span class="permalink"><a href="#P1F_4">◆ </a></span>P1F_4</h2>
874
875 <div class="memitem">
876 <div class="memproto">
877 <table class="memname">
878 <tr>
879 <td class="memname">#define P1F_4   0b00010000</td>
880 </tr>
881 </table>
882 </div><div class="memdoc">
883
884 </div>
885 </div>
886 <a id="P1F_3" name="P1F_3"></a>
887 <h2 class="memtitle"><span class="permalink"><a href="#P1F_3">◆ </a></span>P1F_3</h2>
888
889 <div class="memitem">
890 <div class="memproto">
891 <table class="memname">
892 <tr>
893 <td class="memname">#define P1F_3   0b00001000</td>
894 </tr>
895 </table>
896 </div><div class="memdoc">
897
898 </div>
899 </div>
900 <a id="P1F_2" name="P1F_2"></a>
901 <h2 class="memtitle"><span class="permalink"><a href="#P1F_2">◆ </a></span>P1F_2</h2>
902
903 <div class="memitem">
904 <div class="memproto">
905 <table class="memname">
906 <tr>
907 <td class="memname">#define P1F_2   0b00000100</td>
908 </tr>
909 </table>
910 </div><div class="memdoc">
911
912 </div>
913 </div>
914 <a id="P1F_1" name="P1F_1"></a>
915 <h2 class="memtitle"><span class="permalink"><a href="#P1F_1">◆ </a></span>P1F_1</h2>
916
917 <div class="memitem">
918 <div class="memproto">
919 <table class="memname">
920 <tr>
921 <td class="memname">#define P1F_1   0b00000010</td>
922 </tr>
923 </table>
924 </div><div class="memdoc">
925
926 </div>
927 </div>
928 <a id="P1F_0" name="P1F_0"></a>
929 <h2 class="memtitle"><span class="permalink"><a href="#P1F_0">◆ </a></span>P1F_0</h2>
930
931 <div class="memitem">
932 <div class="memproto">
933 <table class="memname">
934 <tr>
935 <td class="memname">#define P1F_0   0b00000001</td>
936 </tr>
937 </table>
938 </div><div class="memdoc">
939
940 </div>
941 </div>
942 <a id="P1F_GET_DPAD" name="P1F_GET_DPAD"></a>
943 <h2 class="memtitle"><span class="permalink"><a href="#P1F_GET_DPAD">◆ </a></span>P1F_GET_DPAD</h2>
944
945 <div class="memitem">
946 <div class="memproto">
947 <table class="memname">
948 <tr>
949 <td class="memname">#define P1F_GET_DPAD   <a class="el" href="gb_2hardware_8h.html#P1F_5">P1F_5</a></td>
950 </tr>
951 </table>
952 </div><div class="memdoc">
953
954 </div>
955 </div>
956 <a id="P1F_GET_BTN" name="P1F_GET_BTN"></a>
957 <h2 class="memtitle"><span class="permalink"><a href="#P1F_GET_BTN">◆ </a></span>P1F_GET_BTN</h2>
958
959 <div class="memitem">
960 <div class="memproto">
961 <table class="memname">
962 <tr>
963 <td class="memname">#define P1F_GET_BTN   <a class="el" href="gb_2hardware_8h.html#P1F_4">P1F_4</a></td>
964 </tr>
965 </table>
966 </div><div class="memdoc">
967
968 </div>
969 </div>
970 <a id="P1F_GET_NONE" name="P1F_GET_NONE"></a>
971 <h2 class="memtitle"><span class="permalink"><a href="#P1F_GET_NONE">◆ </a></span>P1F_GET_NONE</h2>
972
973 <div class="memitem">
974 <div class="memproto">
975 <table class="memname">
976 <tr>
977 <td class="memname">#define P1F_GET_NONE   (<a class="el" href="gb_2hardware_8h.html#P1F_4">P1F_4</a> | <a class="el" href="gb_2hardware_8h.html#P1F_5">P1F_5</a>)</td>
978 </tr>
979 </table>
980 </div><div class="memdoc">
981
982 </div>
983 </div>
984 <a id="rSB" name="rSB"></a>
985 <h2 class="memtitle"><span class="permalink"><a href="#rSB">◆ </a></span>rSB</h2>
986
987 <div class="memitem">
988 <div class="memproto">
989 <table class="memname">
990 <tr>
991 <td class="memname">#define rSB   <a class="el" href="gb_2hardware_8h.html#SB_REG">SB_REG</a></td>
992 </tr>
993 </table>
994 </div><div class="memdoc">
995
996 </div>
997 </div>
998 <a id="rSC" name="rSC"></a>
999 <h2 class="memtitle"><span class="permalink"><a href="#rSC">◆ </a></span>rSC</h2>
1000
1001 <div class="memitem">
1002 <div class="memproto">
1003 <table class="memname">
1004 <tr>
1005 <td class="memname">#define rSC   <a class="el" href="gb_2hardware_8h.html#SC_REG">SC_REG</a></td>
1006 </tr>
1007 </table>
1008 </div><div class="memdoc">
1009
1010 </div>
1011 </div>
1012 <a id="SIOF_XFER_START" name="SIOF_XFER_START"></a>
1013 <h2 class="memtitle"><span class="permalink"><a href="#SIOF_XFER_START">◆ </a></span>SIOF_XFER_START</h2>
1014
1015 <div class="memitem">
1016 <div class="memproto">
1017 <table class="memname">
1018 <tr>
1019 <td class="memname">#define SIOF_XFER_START   0b10000000</td>
1020 </tr>
1021 </table>
1022 </div><div class="memdoc">
1023 <p >Serial IO: Start Transfer. Automatically cleared at the end of transfer </p>
1024
1025 </div>
1026 </div>
1027 <a id="SIOF_CLOCK_INT" name="SIOF_CLOCK_INT"></a>
1028 <h2 class="memtitle"><span class="permalink"><a href="#SIOF_CLOCK_INT">◆ </a></span>SIOF_CLOCK_INT</h2>
1029
1030 <div class="memitem">
1031 <div class="memproto">
1032 <table class="memname">
1033 <tr>
1034 <td class="memname">#define SIOF_CLOCK_INT   0b00000001</td>
1035 </tr>
1036 </table>
1037 </div><div class="memdoc">
1038 <p >Serial IO: Use Internal clock </p>
1039
1040 </div>
1041 </div>
1042 <a id="SIOF_CLOCK_EXT" name="SIOF_CLOCK_EXT"></a>
1043 <h2 class="memtitle"><span class="permalink"><a href="#SIOF_CLOCK_EXT">◆ </a></span>SIOF_CLOCK_EXT</h2>
1044
1045 <div class="memitem">
1046 <div class="memproto">
1047 <table class="memname">
1048 <tr>
1049 <td class="memname">#define SIOF_CLOCK_EXT   0b00000000</td>
1050 </tr>
1051 </table>
1052 </div><div class="memdoc">
1053 <p >Serial IO: Use External clock </p>
1054
1055 </div>
1056 </div>
1057 <a id="SIOF_SPEED_1X" name="SIOF_SPEED_1X"></a>
1058 <h2 class="memtitle"><span class="permalink"><a href="#SIOF_SPEED_1X">◆ </a></span>SIOF_SPEED_1X</h2>
1059
1060 <div class="memitem">
1061 <div class="memproto">
1062 <table class="memname">
1063 <tr>
1064 <td class="memname">#define SIOF_SPEED_1X   0b00000000</td>
1065 </tr>
1066 </table>
1067 </div><div class="memdoc">
1068 <p >Serial IO: If internal clock then 8KHz mode, 1KB/s (16Khz in CGB high-speed mode, 2KB/s) </p>
1069
1070 </div>
1071 </div>
1072 <a id="SIOF_SPEED_32X" name="SIOF_SPEED_32X"></a>
1073 <h2 class="memtitle"><span class="permalink"><a href="#SIOF_SPEED_32X">◆ </a></span>SIOF_SPEED_32X</h2>
1074
1075 <div class="memitem">
1076 <div class="memproto">
1077 <table class="memname">
1078 <tr>
1079 <td class="memname">#define SIOF_SPEED_32X   0b00000010</td>
1080 </tr>
1081 </table>
1082 </div><div class="memdoc">
1083 <p >Serial IO: <b>CGB-Mode ONLY</b> If internal clock then 256KHz mode, 32KB/s (512KHz in CGB high-speed mode, 64KB/s) </p>
1084
1085 </div>
1086 </div>
1087 <a id="SIOF_B_CLOCK" name="SIOF_B_CLOCK"></a>
1088 <h2 class="memtitle"><span class="permalink"><a href="#SIOF_B_CLOCK">◆ </a></span>SIOF_B_CLOCK</h2>
1089
1090 <div class="memitem">
1091 <div class="memproto">
1092 <table class="memname">
1093 <tr>
1094 <td class="memname">#define SIOF_B_CLOCK   0</td>
1095 </tr>
1096 </table>
1097 </div><div class="memdoc">
1098
1099 </div>
1100 </div>
1101 <a id="SIOF_B_SPEED" name="SIOF_B_SPEED"></a>
1102 <h2 class="memtitle"><span class="permalink"><a href="#SIOF_B_SPEED">◆ </a></span>SIOF_B_SPEED</h2>
1103
1104 <div class="memitem">
1105 <div class="memproto">
1106 <table class="memname">
1107 <tr>
1108 <td class="memname">#define SIOF_B_SPEED   1</td>
1109 </tr>
1110 </table>
1111 </div><div class="memdoc">
1112
1113 </div>
1114 </div>
1115 <a id="SIOF_B_XFER_START" name="SIOF_B_XFER_START"></a>
1116 <h2 class="memtitle"><span class="permalink"><a href="#SIOF_B_XFER_START">◆ </a></span>SIOF_B_XFER_START</h2>
1117
1118 <div class="memitem">
1119 <div class="memproto">
1120 <table class="memname">
1121 <tr>
1122 <td class="memname">#define SIOF_B_XFER_START   7</td>
1123 </tr>
1124 </table>
1125 </div><div class="memdoc">
1126
1127 </div>
1128 </div>
1129 <a id="SCF_START" name="SCF_START"></a>
1130 <h2 class="memtitle"><span class="permalink"><a href="#SCF_START">◆ </a></span>SCF_START</h2>
1131
1132 <div class="memitem">
1133 <div class="memproto">
1134 <table class="memname">
1135 <tr>
1136 <td class="memname">#define SCF_START   <a class="el" href="gb_2hardware_8h.html#SIOF_XFER_START">SIOF_XFER_START</a></td>
1137 </tr>
1138 </table>
1139 </div><div class="memdoc">
1140
1141 </div>
1142 </div>
1143 <a id="SCF_SOURCE" name="SCF_SOURCE"></a>
1144 <h2 class="memtitle"><span class="permalink"><a href="#SCF_SOURCE">◆ </a></span>SCF_SOURCE</h2>
1145
1146 <div class="memitem">
1147 <div class="memproto">
1148 <table class="memname">
1149 <tr>
1150 <td class="memname">#define SCF_SOURCE   <a class="el" href="gb_2hardware_8h.html#SIOF_CLOCK_INT">SIOF_CLOCK_INT</a></td>
1151 </tr>
1152 </table>
1153 </div><div class="memdoc">
1154
1155 </div>
1156 </div>
1157 <a id="SCF_SPEED" name="SCF_SPEED"></a>
1158 <h2 class="memtitle"><span class="permalink"><a href="#SCF_SPEED">◆ </a></span>SCF_SPEED</h2>
1159
1160 <div class="memitem">
1161 <div class="memproto">
1162 <table class="memname">
1163 <tr>
1164 <td class="memname">#define SCF_SPEED   <a class="el" href="gb_2hardware_8h.html#SIOF_SPEED_32X">SIOF_SPEED_32X</a></td>
1165 </tr>
1166 </table>
1167 </div><div class="memdoc">
1168
1169 </div>
1170 </div>
1171 <a id="rDIV" name="rDIV"></a>
1172 <h2 class="memtitle"><span class="permalink"><a href="#rDIV">◆ </a></span>rDIV</h2>
1173
1174 <div class="memitem">
1175 <div class="memproto">
1176 <table class="memname">
1177 <tr>
1178 <td class="memname">#define rDIV   <a class="el" href="gb_2hardware_8h.html#DIV_REG">DIV_REG</a></td>
1179 </tr>
1180 </table>
1181 </div><div class="memdoc">
1182
1183 </div>
1184 </div>
1185 <a id="rTIMA" name="rTIMA"></a>
1186 <h2 class="memtitle"><span class="permalink"><a href="#rTIMA">◆ </a></span>rTIMA</h2>
1187
1188 <div class="memitem">
1189 <div class="memproto">
1190 <table class="memname">
1191 <tr>
1192 <td class="memname">#define rTIMA   <a class="el" href="sms_2hardware_8h.html#TIMA_REG">TIMA_REG</a></td>
1193 </tr>
1194 </table>
1195 </div><div class="memdoc">
1196
1197 </div>
1198 </div>
1199 <a id="rTMA" name="rTMA"></a>
1200 <h2 class="memtitle"><span class="permalink"><a href="#rTMA">◆ </a></span>rTMA</h2>
1201
1202 <div class="memitem">
1203 <div class="memproto">
1204 <table class="memname">
1205 <tr>
1206 <td class="memname">#define rTMA   <a class="el" href="sms_2hardware_8h.html#TMA_REG">TMA_REG</a></td>
1207 </tr>
1208 </table>
1209 </div><div class="memdoc">
1210
1211 </div>
1212 </div>
1213 <a id="rTAC" name="rTAC"></a>
1214 <h2 class="memtitle"><span class="permalink"><a href="#rTAC">◆ </a></span>rTAC</h2>
1215
1216 <div class="memitem">
1217 <div class="memproto">
1218 <table class="memname">
1219 <tr>
1220 <td class="memname">#define rTAC   <a class="el" href="sms_2hardware_8h.html#TAC_REG">TAC_REG</a></td>
1221 </tr>
1222 </table>
1223 </div><div class="memdoc">
1224
1225 </div>
1226 </div>
1227 <a id="TACF_START" name="TACF_START"></a>
1228 <h2 class="memtitle"><span class="permalink"><a href="#TACF_START">◆ </a></span>TACF_START</h2>
1229
1230 <div class="memitem">
1231 <div class="memproto">
1232 <table class="memname">
1233 <tr>
1234 <td class="memname">#define TACF_START   0b00000100</td>
1235 </tr>
1236 </table>
1237 </div><div class="memdoc">
1238
1239 </div>
1240 </div>
1241 <a id="TACF_STOP" name="TACF_STOP"></a>
1242 <h2 class="memtitle"><span class="permalink"><a href="#TACF_STOP">◆ </a></span>TACF_STOP</h2>
1243
1244 <div class="memitem">
1245 <div class="memproto">
1246 <table class="memname">
1247 <tr>
1248 <td class="memname">#define TACF_STOP   0b00000000</td>
1249 </tr>
1250 </table>
1251 </div><div class="memdoc">
1252
1253 </div>
1254 </div>
1255 <a id="TACF_4KHZ" name="TACF_4KHZ"></a>
1256 <h2 class="memtitle"><span class="permalink"><a href="#TACF_4KHZ">◆ </a></span>TACF_4KHZ</h2>
1257
1258 <div class="memitem">
1259 <div class="memproto">
1260 <table class="memname">
1261 <tr>
1262 <td class="memname">#define TACF_4KHZ   0b00000000</td>
1263 </tr>
1264 </table>
1265 </div><div class="memdoc">
1266
1267 </div>
1268 </div>
1269 <a id="TACF_16KHZ" name="TACF_16KHZ"></a>
1270 <h2 class="memtitle"><span class="permalink"><a href="#TACF_16KHZ">◆ </a></span>TACF_16KHZ</h2>
1271
1272 <div class="memitem">
1273 <div class="memproto">
1274 <table class="memname">
1275 <tr>
1276 <td class="memname">#define TACF_16KHZ   0b00000011</td>
1277 </tr>
1278 </table>
1279 </div><div class="memdoc">
1280
1281 </div>
1282 </div>
1283 <a id="TACF_65KHZ" name="TACF_65KHZ"></a>
1284 <h2 class="memtitle"><span class="permalink"><a href="#TACF_65KHZ">◆ </a></span>TACF_65KHZ</h2>
1285
1286 <div class="memitem">
1287 <div class="memproto">
1288 <table class="memname">
1289 <tr>
1290 <td class="memname">#define TACF_65KHZ   0b00000010</td>
1291 </tr>
1292 </table>
1293 </div><div class="memdoc">
1294
1295 </div>
1296 </div>
1297 <a id="TACF_262KHZ" name="TACF_262KHZ"></a>
1298 <h2 class="memtitle"><span class="permalink"><a href="#TACF_262KHZ">◆ </a></span>TACF_262KHZ</h2>
1299
1300 <div class="memitem">
1301 <div class="memproto">
1302 <table class="memname">
1303 <tr>
1304 <td class="memname">#define TACF_262KHZ   0b00000001</td>
1305 </tr>
1306 </table>
1307 </div><div class="memdoc">
1308
1309 </div>
1310 </div>
1311 <a id="rIF" name="rIF"></a>
1312 <h2 class="memtitle"><span class="permalink"><a href="#rIF">◆ </a></span>rIF</h2>
1313
1314 <div class="memitem">
1315 <div class="memproto">
1316 <table class="memname">
1317 <tr>
1318 <td class="memname">#define rIF   <a class="el" href="gb_2hardware_8h.html#IF_REG">IF_REG</a></td>
1319 </tr>
1320 </table>
1321 </div><div class="memdoc">
1322
1323 </div>
1324 </div>
1325 <a id="rAUD1SWEEP" name="rAUD1SWEEP"></a>
1326 <h2 class="memtitle"><span class="permalink"><a href="#rAUD1SWEEP">◆ </a></span>rAUD1SWEEP</h2>
1327
1328 <div class="memitem">
1329 <div class="memproto">
1330 <table class="memname">
1331 <tr>
1332 <td class="memname">#define rAUD1SWEEP   <a class="el" href="gb_2hardware_8h.html#NR10_REG">NR10_REG</a></td>
1333 </tr>
1334 </table>
1335 </div><div class="memdoc">
1336 <p >Sound Channel 1, NR10: Sweep </p>
1337
1338 </div>
1339 </div>
1340 <a id="AUD1SWEEP_UP" name="AUD1SWEEP_UP"></a>
1341 <h2 class="memtitle"><span class="permalink"><a href="#AUD1SWEEP_UP">◆ </a></span>AUD1SWEEP_UP</h2>
1342
1343 <div class="memitem">
1344 <div class="memproto">
1345 <table class="memname">
1346 <tr>
1347 <td class="memname">#define AUD1SWEEP_UP   0b00000000</td>
1348 </tr>
1349 </table>
1350 </div><div class="memdoc">
1351 <p >For Sound Channel 1, NR10: Sweep Addition, period increases </p>
1352
1353 </div>
1354 </div>
1355 <a id="AUD1SWEEP_DOWN" name="AUD1SWEEP_DOWN"></a>
1356 <h2 class="memtitle"><span class="permalink"><a href="#AUD1SWEEP_DOWN">◆ </a></span>AUD1SWEEP_DOWN</h2>
1357
1358 <div class="memitem">
1359 <div class="memproto">
1360 <table class="memname">
1361 <tr>
1362 <td class="memname">#define AUD1SWEEP_DOWN   0b00001000</td>
1363 </tr>
1364 </table>
1365 </div><div class="memdoc">
1366 <p >For Sound Channel 1, NR10: Sweep Subtraction, period decreases </p>
1367
1368 </div>
1369 </div>
1370 <a id="AUD1SWEEP_TIME" name="AUD1SWEEP_TIME"></a>
1371 <h2 class="memtitle"><span class="permalink"><a href="#AUD1SWEEP_TIME">◆ </a></span>AUD1SWEEP_TIME</h2>
1372
1373 <div class="memitem">
1374 <div class="memproto">
1375 <table class="memname">
1376 <tr>
1377 <td class="memname">#define AUD1SWEEP_TIME</td>
1378 <td>(</td>
1379 <td class="paramtype"> </td>
1380 <td class="paramname">x</td><td>)</td>
1381 <td>   ((x) << 4)</td>
1382 </tr>
1383 </table>
1384 </div><div class="memdoc">
1385 <p >For Sound Channel 1, NR10: Sweep Time/Pace, Range: 0-7 </p>
1386
1387 </div>
1388 </div>
1389 <a id="AUD1SWEEP_LENGTH" name="AUD1SWEEP_LENGTH"></a>
1390 <h2 class="memtitle"><span class="permalink"><a href="#AUD1SWEEP_LENGTH">◆ </a></span>AUD1SWEEP_LENGTH</h2>
1391
1392 <div class="memitem">
1393 <div class="memproto">
1394 <table class="memname">
1395 <tr>
1396 <td class="memname">#define AUD1SWEEP_LENGTH</td>
1397 <td>(</td>
1398 <td class="paramtype"> </td>
1399 <td class="paramname">x</td><td>)</td>
1400 <td>   (x)</td>
1401 </tr>
1402 </table>
1403 </div><div class="memdoc">
1404 <p >For Sound Channel 1, NR10: Sweep Length/Individual step, Range: 0-7 </p>
1405
1406 </div>
1407 </div>
1408 <a id="rAUD1LEN" name="rAUD1LEN"></a>
1409 <h2 class="memtitle"><span class="permalink"><a href="#rAUD1LEN">◆ </a></span>rAUD1LEN</h2>
1410
1411 <div class="memitem">
1412 <div class="memproto">
1413 <table class="memname">
1414 <tr>
1415 <td class="memname">#define rAUD1LEN   <a class="el" href="gb_2hardware_8h.html#NR11_REG">NR11_REG</a></td>
1416 </tr>
1417 </table>
1418 </div><div class="memdoc">
1419 <p >Sound Channel 1, NR11: Sound length/Wave pattern duty </p>
1420
1421 </div>
1422 </div>
1423 <a id="rAUD1ENV" name="rAUD1ENV"></a>
1424 <h2 class="memtitle"><span class="permalink"><a href="#rAUD1ENV">◆ </a></span>rAUD1ENV</h2>
1425
1426 <div class="memitem">
1427 <div class="memproto">
1428 <table class="memname">
1429 <tr>
1430 <td class="memname">#define rAUD1ENV   <a class="el" href="gb_2hardware_8h.html#NR12_REG">NR12_REG</a></td>
1431 </tr>
1432 </table>
1433 </div><div class="memdoc">
1434 <p >Sound Channel 1, NR12: Volume Envelope </p>
1435
1436 </div>
1437 </div>
1438 <a id="rAUD1LOW" name="rAUD1LOW"></a>
1439 <h2 class="memtitle"><span class="permalink"><a href="#rAUD1LOW">◆ </a></span>rAUD1LOW</h2>
1440
1441 <div class="memitem">
1442 <div class="memproto">
1443 <table class="memname">
1444 <tr>
1445 <td class="memname">#define rAUD1LOW   <a class="el" href="gb_2hardware_8h.html#NR13_REG">NR13_REG</a></td>
1446 </tr>
1447 </table>
1448 </div><div class="memdoc">
1449 <p >Sound Channel 1, NR13: Frequency Low </p>
1450
1451 </div>
1452 </div>
1453 <a id="rAUD1HIGH" name="rAUD1HIGH"></a>
1454 <h2 class="memtitle"><span class="permalink"><a href="#rAUD1HIGH">◆ </a></span>rAUD1HIGH</h2>
1455
1456 <div class="memitem">
1457 <div class="memproto">
1458 <table class="memname">
1459 <tr>
1460 <td class="memname">#define rAUD1HIGH   <a class="el" href="gb_2hardware_8h.html#NR14_REG">NR14_REG</a></td>
1461 </tr>
1462 </table>
1463 </div><div class="memdoc">
1464 <p >Sound Channel 1, NR14: Frequency High </p>
1465
1466 </div>
1467 </div>
1468 <a id="rAUD2LEN" name="rAUD2LEN"></a>
1469 <h2 class="memtitle"><span class="permalink"><a href="#rAUD2LEN">◆ </a></span>rAUD2LEN</h2>
1470
1471 <div class="memitem">
1472 <div class="memproto">
1473 <table class="memname">
1474 <tr>
1475 <td class="memname">#define rAUD2LEN   <a class="el" href="gb_2hardware_8h.html#NR21_REG">NR21_REG</a></td>
1476 </tr>
1477 </table>
1478 </div><div class="memdoc">
1479 <p >Sound Channel 2, NR21_REG: Tone </p>
1480
1481 </div>
1482 </div>
1483 <a id="rAUD2ENV" name="rAUD2ENV"></a>
1484 <h2 class="memtitle"><span class="permalink"><a href="#rAUD2ENV">◆ </a></span>rAUD2ENV</h2>
1485
1486 <div class="memitem">
1487 <div class="memproto">
1488 <table class="memname">
1489 <tr>
1490 <td class="memname">#define rAUD2ENV   <a class="el" href="gb_2hardware_8h.html#NR22_REG">NR22_REG</a></td>
1491 </tr>
1492 </table>
1493 </div><div class="memdoc">
1494 <p >Sound Channel 2, NR22_REG: Volume Envelope </p>
1495
1496 </div>
1497 </div>
1498 <a id="rAUD2LOW" name="rAUD2LOW"></a>
1499 <h2 class="memtitle"><span class="permalink"><a href="#rAUD2LOW">◆ </a></span>rAUD2LOW</h2>
1500
1501 <div class="memitem">
1502 <div class="memproto">
1503 <table class="memname">
1504 <tr>
1505 <td class="memname">#define rAUD2LOW   <a class="el" href="gb_2hardware_8h.html#NR23_REG">NR23_REG</a></td>
1506 </tr>
1507 </table>
1508 </div><div class="memdoc">
1509 <p >Sound Channel 2, NR23_REG: Frequency data Low </p>
1510
1511 </div>
1512 </div>
1513 <a id="rAUD2HIGH" name="rAUD2HIGH"></a>
1514 <h2 class="memtitle"><span class="permalink"><a href="#rAUD2HIGH">◆ </a></span>rAUD2HIGH</h2>
1515
1516 <div class="memitem">
1517 <div class="memproto">
1518 <table class="memname">
1519 <tr>
1520 <td class="memname">#define rAUD2HIGH   <a class="el" href="gb_2hardware_8h.html#NR24_REG">NR24_REG</a></td>
1521 </tr>
1522 </table>
1523 </div><div class="memdoc">
1524 <p >Sound Channel 2, NR24_REG: Frequency data High </p>
1525
1526 </div>
1527 </div>
1528 <a id="rAUD3ENA" name="rAUD3ENA"></a>
1529 <h2 class="memtitle"><span class="permalink"><a href="#rAUD3ENA">◆ </a></span>rAUD3ENA</h2>
1530
1531 <div class="memitem">
1532 <div class="memproto">
1533 <table class="memname">
1534 <tr>
1535 <td class="memname">#define rAUD3ENA   <a class="el" href="gb_2hardware_8h.html#NR30_REG">NR30_REG</a></td>
1536 </tr>
1537 </table>
1538 </div><div class="memdoc">
1539 <p >Sound Channel 3, NR30_REG: Sound on/off </p>
1540
1541 </div>
1542 </div>
1543 <a id="rAUD3LEN" name="rAUD3LEN"></a>
1544 <h2 class="memtitle"><span class="permalink"><a href="#rAUD3LEN">◆ </a></span>rAUD3LEN</h2>
1545
1546 <div class="memitem">
1547 <div class="memproto">
1548 <table class="memname">
1549 <tr>
1550 <td class="memname">#define rAUD3LEN   <a class="el" href="gb_2hardware_8h.html#NR31_REG">NR31_REG</a></td>
1551 </tr>
1552 </table>
1553 </div><div class="memdoc">
1554 <p >Sound Channel 3, NR31_REG: Sound Length </p>
1555
1556 </div>
1557 </div>
1558 <a id="rAUD3LEVEL" name="rAUD3LEVEL"></a>
1559 <h2 class="memtitle"><span class="permalink"><a href="#rAUD3LEVEL">◆ </a></span>rAUD3LEVEL</h2>
1560
1561 <div class="memitem">
1562 <div class="memproto">
1563 <table class="memname">
1564 <tr>
1565 <td class="memname">#define rAUD3LEVEL   <a class="el" href="gb_2hardware_8h.html#NR32_REG">NR32_REG</a></td>
1566 </tr>
1567 </table>
1568 </div><div class="memdoc">
1569 <p >Sound Channel 3, NR32_REG: Select output level </p>
1570
1571 </div>
1572 </div>
1573 <a id="rAUD3LOW" name="rAUD3LOW"></a>
1574 <h2 class="memtitle"><span class="permalink"><a href="#rAUD3LOW">◆ </a></span>rAUD3LOW</h2>
1575
1576 <div class="memitem">
1577 <div class="memproto">
1578 <table class="memname">
1579 <tr>
1580 <td class="memname">#define rAUD3LOW   <a class="el" href="gb_2hardware_8h.html#NR33_REG">NR33_REG</a></td>
1581 </tr>
1582 </table>
1583 </div><div class="memdoc">
1584 <p >Sound Channel 3, NR33_REG: Frequency data Low </p>
1585
1586 </div>
1587 </div>
1588 <a id="rAUD3HIGH" name="rAUD3HIGH"></a>
1589 <h2 class="memtitle"><span class="permalink"><a href="#rAUD3HIGH">◆ </a></span>rAUD3HIGH</h2>
1590
1591 <div class="memitem">
1592 <div class="memproto">
1593 <table class="memname">
1594 <tr>
1595 <td class="memname">#define rAUD3HIGH   <a class="el" href="gb_2hardware_8h.html#NR34_REG">NR34_REG</a></td>
1596 </tr>
1597 </table>
1598 </div><div class="memdoc">
1599 <p >Sound Channel 3, NR34_REG: Frequency data High </p>
1600
1601 </div>
1602 </div>
1603 <a id="rAUD4LEN" name="rAUD4LEN"></a>
1604 <h2 class="memtitle"><span class="permalink"><a href="#rAUD4LEN">◆ </a></span>rAUD4LEN</h2>
1605
1606 <div class="memitem">
1607 <div class="memproto">
1608 <table class="memname">
1609 <tr>
1610 <td class="memname">#define rAUD4LEN   <a class="el" href="gb_2hardware_8h.html#NR41_REG">NR41_REG</a></td>
1611 </tr>
1612 </table>
1613 </div><div class="memdoc">
1614 <p >Sound Channel 4, NR41_REG: Sound Length </p>
1615
1616 </div>
1617 </div>
1618 <a id="rAUD4ENV" name="rAUD4ENV"></a>
1619 <h2 class="memtitle"><span class="permalink"><a href="#rAUD4ENV">◆ </a></span>rAUD4ENV</h2>
1620
1621 <div class="memitem">
1622 <div class="memproto">
1623 <table class="memname">
1624 <tr>
1625 <td class="memname">#define rAUD4ENV   <a class="el" href="gb_2hardware_8h.html#NR42_REG">NR42_REG</a></td>
1626 </tr>
1627 </table>
1628 </div><div class="memdoc">
1629 <p >Sound Channel 4, NR42_REG: Volume Envelope </p>
1630
1631 </div>
1632 </div>
1633 <a id="rAUD4POLY" name="rAUD4POLY"></a>
1634 <h2 class="memtitle"><span class="permalink"><a href="#rAUD4POLY">◆ </a></span>rAUD4POLY</h2>
1635
1636 <div class="memitem">
1637 <div class="memproto">
1638 <table class="memname">
1639 <tr>
1640 <td class="memname">#define rAUD4POLY   <a class="el" href="gb_2hardware_8h.html#NR43_REG">NR43_REG</a></td>
1641 </tr>
1642 </table>
1643 </div><div class="memdoc">
1644 <p >Sound Channel 4, NR43_REG: Polynomial Counter </p>
1645
1646 </div>
1647 </div>
1648 <a id="AUD4POLY_WIDTH_15BIT" name="AUD4POLY_WIDTH_15BIT"></a>
1649 <h2 class="memtitle"><span class="permalink"><a href="#AUD4POLY_WIDTH_15BIT">◆ </a></span>AUD4POLY_WIDTH_15BIT</h2>
1650
1651 <div class="memitem">
1652 <div class="memproto">
1653 <table class="memname">
1654 <tr>
1655 <td class="memname">#define AUD4POLY_WIDTH_15BIT   0x00</td>
1656 </tr>
1657 </table>
1658 </div><div class="memdoc">
1659 <p >For Sound Channel 4, NR43_REG: Polynomial counter use 15 steps <br />
1660 </p>
1661
1662 </div>
1663 </div>
1664 <a id="AUD4POLY_WIDTH_7BIT" name="AUD4POLY_WIDTH_7BIT"></a>
1665 <h2 class="memtitle"><span class="permalink"><a href="#AUD4POLY_WIDTH_7BIT">◆ </a></span>AUD4POLY_WIDTH_7BIT</h2>
1666
1667 <div class="memitem">
1668 <div class="memproto">
1669 <table class="memname">
1670 <tr>
1671 <td class="memname">#define AUD4POLY_WIDTH_7BIT   0x08</td>
1672 </tr>
1673 </table>
1674 </div><div class="memdoc">
1675 <p >For Sound Channel 4, NR43_REG: Polynomial counter use 7 steps <br />
1676 </p>
1677
1678 </div>
1679 </div>
1680 <a id="rAUD4GO" name="rAUD4GO"></a>
1681 <h2 class="memtitle"><span class="permalink"><a href="#rAUD4GO">◆ </a></span>rAUD4GO</h2>
1682
1683 <div class="memitem">
1684 <div class="memproto">
1685 <table class="memname">
1686 <tr>
1687 <td class="memname">#define rAUD4GO   <a class="el" href="gb_2hardware_8h.html#NR44_REG">NR44_REG</a></td>
1688 </tr>
1689 </table>
1690 </div><div class="memdoc">
1691 <p >Sound Channel 4, NR44_REG: Counter / Consecutive and Initial <br />
1692 </p>
1693
1694 </div>
1695 </div>
1696 <a id="rAUDVOL" name="rAUDVOL"></a>
1697 <h2 class="memtitle"><span class="permalink"><a href="#rAUDVOL">◆ </a></span>rAUDVOL</h2>
1698
1699 <div class="memitem">
1700 <div class="memproto">
1701 <table class="memname">
1702 <tr>
1703 <td class="memname">#define rAUDVOL   <a class="el" href="gb_2hardware_8h.html#NR50_REG">NR50_REG</a></td>
1704 </tr>
1705 </table>
1706 </div><div class="memdoc">
1707 <p >Sound Master Volume, NR50: Volume and Cart external sound input (VIN) </p>
1708
1709 </div>
1710 </div>
1711 <a id="AUDVOL_VOL_LEFT" name="AUDVOL_VOL_LEFT"></a>
1712 <h2 class="memtitle"><span class="permalink"><a href="#AUDVOL_VOL_LEFT">◆ </a></span>AUDVOL_VOL_LEFT</h2>
1713
1714 <div class="memitem">
1715 <div class="memproto">
1716 <table class="memname">
1717 <tr>
1718 <td class="memname">#define AUDVOL_VOL_LEFT</td>
1719 <td>(</td>
1720 <td class="paramtype"> </td>
1721 <td class="paramname">x</td><td>)</td>
1722 <td>   ((x) << 4)</td>
1723 </tr>
1724 </table>
1725 </div><div class="memdoc">
1726 <p >For Sound Master Volume, NR50: Left Volume, Range: 0-7 </p>
1727
1728 </div>
1729 </div>
1730 <a id="AUDVOL_VOL_RIGHT" name="AUDVOL_VOL_RIGHT"></a>
1731 <h2 class="memtitle"><span class="permalink"><a href="#AUDVOL_VOL_RIGHT">◆ </a></span>AUDVOL_VOL_RIGHT</h2>
1732
1733 <div class="memitem">
1734 <div class="memproto">
1735 <table class="memname">
1736 <tr>
1737 <td class="memname">#define AUDVOL_VOL_RIGHT</td>
1738 <td>(</td>
1739 <td class="paramtype"> </td>
1740 <td class="paramname">x</td><td>)</td>
1741 <td>   ((x))</td>
1742 </tr>
1743 </table>
1744 </div><div class="memdoc">
1745 <p >For Sound Master Volume, NR50: Right Volume, Range: 0-7 </p>
1746
1747 </div>
1748 </div>
1749 <a id="AUDVOL_VIN_LEFT" name="AUDVOL_VIN_LEFT"></a>
1750 <h2 class="memtitle"><span class="permalink"><a href="#AUDVOL_VIN_LEFT">◆ </a></span>AUDVOL_VIN_LEFT</h2>
1751
1752 <div class="memitem">
1753 <div class="memproto">
1754 <table class="memname">
1755 <tr>
1756 <td class="memname">#define AUDVOL_VIN_LEFT   0b10000000</td>
1757 </tr>
1758 </table>
1759 </div><div class="memdoc">
1760 <p >For Sound Master Volume, NR50: Cart external sound input (VIN) Left bit, 1 = ON, 0 = OFF </p>
1761
1762 </div>
1763 </div>
1764 <a id="AUDVOL_VIN_RIGHT" name="AUDVOL_VIN_RIGHT"></a>
1765 <h2 class="memtitle"><span class="permalink"><a href="#AUDVOL_VIN_RIGHT">◆ </a></span>AUDVOL_VIN_RIGHT</h2>
1766
1767 <div class="memitem">
1768 <div class="memproto">
1769 <table class="memname">
1770 <tr>
1771 <td class="memname">#define AUDVOL_VIN_RIGHT   0b00001000</td>
1772 </tr>
1773 </table>
1774 </div><div class="memdoc">
1775 <p >For Sound Master Volume, NR50: Cart external sound input (VIN) Right bit, 1 = ON, 0 = OFF </p>
1776
1777 </div>
1778 </div>
1779 <a id="rAUDTERM" name="rAUDTERM"></a>
1780 <h2 class="memtitle"><span class="permalink"><a href="#rAUDTERM">◆ </a></span>rAUDTERM</h2>
1781
1782 <div class="memitem">
1783 <div class="memproto">
1784 <table class="memname">
1785 <tr>
1786 <td class="memname">#define rAUDTERM   <a class="el" href="gb_2hardware_8h.html#NR51_REG">NR51_REG</a></td>
1787 </tr>
1788 </table>
1789 </div><div class="memdoc">
1790 <p >Sound Panning, NR51: Enable/disable left and right output for sound channels </p>
1791
1792 </div>
1793 </div>
1794 <a id="AUDTERM_4_LEFT" name="AUDTERM_4_LEFT"></a>
1795 <h2 class="memtitle"><span class="permalink"><a href="#AUDTERM_4_LEFT">◆ </a></span>AUDTERM_4_LEFT</h2>
1796
1797 <div class="memitem">
1798 <div class="memproto">
1799 <table class="memname">
1800 <tr>
1801 <td class="memname">#define AUDTERM_4_LEFT   0b10000000</td>
1802 </tr>
1803 </table>
1804 </div><div class="memdoc">
1805 <p >For Sound Panning, NR51: Channel 4 Left bit, 1 = ON, 0 = OFF </p>
1806
1807 </div>
1808 </div>
1809 <a id="AUDTERM_3_LEFT" name="AUDTERM_3_LEFT"></a>
1810 <h2 class="memtitle"><span class="permalink"><a href="#AUDTERM_3_LEFT">◆ </a></span>AUDTERM_3_LEFT</h2>
1811
1812 <div class="memitem">
1813 <div class="memproto">
1814 <table class="memname">
1815 <tr>
1816 <td class="memname">#define AUDTERM_3_LEFT   0b01000000</td>
1817 </tr>
1818 </table>
1819 </div><div class="memdoc">
1820 <p >For Sound Panning, NR51: Channel 3 Left bit, 1 = ON, 0 = OFF </p>
1821
1822 </div>
1823 </div>
1824 <a id="AUDTERM_2_LEFT" name="AUDTERM_2_LEFT"></a>
1825 <h2 class="memtitle"><span class="permalink"><a href="#AUDTERM_2_LEFT">◆ </a></span>AUDTERM_2_LEFT</h2>
1826
1827 <div class="memitem">
1828 <div class="memproto">
1829 <table class="memname">
1830 <tr>
1831 <td class="memname">#define AUDTERM_2_LEFT   0b00100000</td>
1832 </tr>
1833 </table>
1834 </div><div class="memdoc">
1835 <p >For Sound Panning, NR51: Channel 2 Left bit, 1 = ON, 0 = OFF </p>
1836
1837 </div>
1838 </div>
1839 <a id="AUDTERM_1_LEFT" name="AUDTERM_1_LEFT"></a>
1840 <h2 class="memtitle"><span class="permalink"><a href="#AUDTERM_1_LEFT">◆ </a></span>AUDTERM_1_LEFT</h2>
1841
1842 <div class="memitem">
1843 <div class="memproto">
1844 <table class="memname">
1845 <tr>
1846 <td class="memname">#define AUDTERM_1_LEFT   0b00010000</td>
1847 </tr>
1848 </table>
1849 </div><div class="memdoc">
1850 <p >For Sound Panning, NR51: Channel 1 Left bit, 1 = ON, 0 = OFF </p>
1851
1852 </div>
1853 </div>
1854 <a id="AUDTERM_4_RIGHT" name="AUDTERM_4_RIGHT"></a>
1855 <h2 class="memtitle"><span class="permalink"><a href="#AUDTERM_4_RIGHT">◆ </a></span>AUDTERM_4_RIGHT</h2>
1856
1857 <div class="memitem">
1858 <div class="memproto">
1859 <table class="memname">
1860 <tr>
1861 <td class="memname">#define AUDTERM_4_RIGHT   0b00001000</td>
1862 </tr>
1863 </table>
1864 </div><div class="memdoc">
1865 <p >For Sound Panning, NR51: Channel 4 Right bit, 1 = ON, 0 = OFF </p>
1866
1867 </div>
1868 </div>
1869 <a id="AUDTERM_3_RIGHT" name="AUDTERM_3_RIGHT"></a>
1870 <h2 class="memtitle"><span class="permalink"><a href="#AUDTERM_3_RIGHT">◆ </a></span>AUDTERM_3_RIGHT</h2>
1871
1872 <div class="memitem">
1873 <div class="memproto">
1874 <table class="memname">
1875 <tr>
1876 <td class="memname">#define AUDTERM_3_RIGHT   0b00000100</td>
1877 </tr>
1878 </table>
1879 </div><div class="memdoc">
1880 <p >For Sound Panning, NR51: Channel 4 Right bit, 1 = ON, 0 = OFF </p>
1881
1882 </div>
1883 </div>
1884 <a id="AUDTERM_2_RIGHT" name="AUDTERM_2_RIGHT"></a>
1885 <h2 class="memtitle"><span class="permalink"><a href="#AUDTERM_2_RIGHT">◆ </a></span>AUDTERM_2_RIGHT</h2>
1886
1887 <div class="memitem">
1888 <div class="memproto">
1889 <table class="memname">
1890 <tr>
1891 <td class="memname">#define AUDTERM_2_RIGHT   0b00000010</td>
1892 </tr>
1893 </table>
1894 </div><div class="memdoc">
1895 <p >For Sound Panning, NR51: Channel 4 Right bit, 1 = ON, 0 = OFF </p>
1896
1897 </div>
1898 </div>
1899 <a id="AUDTERM_1_RIGHT" name="AUDTERM_1_RIGHT"></a>
1900 <h2 class="memtitle"><span class="permalink"><a href="#AUDTERM_1_RIGHT">◆ </a></span>AUDTERM_1_RIGHT</h2>
1901
1902 <div class="memitem">
1903 <div class="memproto">
1904 <table class="memname">
1905 <tr>
1906 <td class="memname">#define AUDTERM_1_RIGHT   0b00000001</td>
1907 </tr>
1908 </table>
1909 </div><div class="memdoc">
1910 <p >For Sound Panning, NR51: Channel 4 Right bit, 1 = ON, 0 = OFF </p>
1911
1912 </div>
1913 </div>
1914 <a id="rAUDENA" name="rAUDENA"></a>
1915 <h2 class="memtitle"><span class="permalink"><a href="#rAUDENA">◆ </a></span>rAUDENA</h2>
1916
1917 <div class="memitem">
1918 <div class="memproto">
1919 <table class="memname">
1920 <tr>
1921 <td class="memname">#define rAUDENA   <a class="el" href="gb_2hardware_8h.html#NR52_REG">NR52_REG</a></td>
1922 </tr>
1923 </table>
1924 </div><div class="memdoc">
1925 <p >Sound Master Control, NR52: ON / OFF </p>
1926
1927 </div>
1928 </div>
1929 <a id="AUDENA_ON" name="AUDENA_ON"></a>
1930 <h2 class="memtitle"><span class="permalink"><a href="#AUDENA_ON">◆ </a></span>AUDENA_ON</h2>
1931
1932 <div class="memitem">
1933 <div class="memproto">
1934 <table class="memname">
1935 <tr>
1936 <td class="memname">#define AUDENA_ON   0b10000000</td>
1937 </tr>
1938 </table>
1939 </div><div class="memdoc">
1940 <p >For Sound Master Control, NR52: Sound ON </p>
1941
1942 </div>
1943 </div>
1944 <a id="AUDENA_OFF" name="AUDENA_OFF"></a>
1945 <h2 class="memtitle"><span class="permalink"><a href="#AUDENA_OFF">◆ </a></span>AUDENA_OFF</h2>
1946
1947 <div class="memitem">
1948 <div class="memproto">
1949 <table class="memname">
1950 <tr>
1951 <td class="memname">#define AUDENA_OFF   0b00000000</td>
1952 </tr>
1953 </table>
1954 </div><div class="memdoc">
1955 <p >For Sound Master Control, NR52: Sound OFF </p>
1956
1957 </div>
1958 </div>
1959 <a id="rLCDC" name="rLCDC"></a>
1960 <h2 class="memtitle"><span class="permalink"><a href="#rLCDC">◆ </a></span>rLCDC</h2>
1961
1962 <div class="memitem">
1963 <div class="memproto">
1964 <table class="memname">
1965 <tr>
1966 <td class="memname">#define rLCDC   <a class="el" href="gb_2hardware_8h.html#LCDC_REG">LCDC_REG</a></td>
1967 </tr>
1968 </table>
1969 </div><div class="memdoc">
1970
1971 </div>
1972 </div>
1973 <a id="LCDCF_OFF" name="LCDCF_OFF"></a>
1974 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_OFF">◆ </a></span>LCDCF_OFF</h2>
1975
1976 <div class="memitem">
1977 <div class="memproto">
1978 <table class="memname">
1979 <tr>
1980 <td class="memname">#define LCDCF_OFF   0b00000000</td>
1981 </tr>
1982 </table>
1983 </div><div class="memdoc">
1984 <p >LCD Control: Off </p>
1985
1986 </div>
1987 </div>
1988 <a id="LCDCF_ON" name="LCDCF_ON"></a>
1989 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_ON">◆ </a></span>LCDCF_ON</h2>
1990
1991 <div class="memitem">
1992 <div class="memproto">
1993 <table class="memname">
1994 <tr>
1995 <td class="memname">#define LCDCF_ON   0b10000000</td>
1996 </tr>
1997 </table>
1998 </div><div class="memdoc">
1999 <p >LCD Control: On </p>
2000
2001 </div>
2002 </div>
2003 <a id="LCDCF_WIN9800" name="LCDCF_WIN9800"></a>
2004 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_WIN9800">◆ </a></span>LCDCF_WIN9800</h2>
2005
2006 <div class="memitem">
2007 <div class="memproto">
2008 <table class="memname">
2009 <tr>
2010 <td class="memname">#define LCDCF_WIN9800   0b00000000</td>
2011 </tr>
2012 </table>
2013 </div><div class="memdoc">
2014 <p >Window Tile Map: Use 9800 Region </p>
2015
2016 </div>
2017 </div>
2018 <a id="LCDCF_WIN9C00" name="LCDCF_WIN9C00"></a>
2019 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_WIN9C00">◆ </a></span>LCDCF_WIN9C00</h2>
2020
2021 <div class="memitem">
2022 <div class="memproto">
2023 <table class="memname">
2024 <tr>
2025 <td class="memname">#define LCDCF_WIN9C00   0b01000000</td>
2026 </tr>
2027 </table>
2028 </div><div class="memdoc">
2029 <p >Window Tile Map: Use 9C00 Region </p>
2030
2031 </div>
2032 </div>
2033 <a id="LCDCF_WINOFF" name="LCDCF_WINOFF"></a>
2034 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_WINOFF">◆ </a></span>LCDCF_WINOFF</h2>
2035
2036 <div class="memitem">
2037 <div class="memproto">
2038 <table class="memname">
2039 <tr>
2040 <td class="memname">#define LCDCF_WINOFF   0b00000000</td>
2041 </tr>
2042 </table>
2043 </div><div class="memdoc">
2044 <p >Window Display: Hidden </p>
2045
2046 </div>
2047 </div>
2048 <a id="LCDCF_WINON" name="LCDCF_WINON"></a>
2049 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_WINON">◆ </a></span>LCDCF_WINON</h2>
2050
2051 <div class="memitem">
2052 <div class="memproto">
2053 <table class="memname">
2054 <tr>
2055 <td class="memname">#define LCDCF_WINON   0b00100000</td>
2056 </tr>
2057 </table>
2058 </div><div class="memdoc">
2059 <p >Window Display: Visible </p>
2060
2061 </div>
2062 </div>
2063 <a id="LCDCF_BG8800" name="LCDCF_BG8800"></a>
2064 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_BG8800">◆ </a></span>LCDCF_BG8800</h2>
2065
2066 <div class="memitem">
2067 <div class="memproto">
2068 <table class="memname">
2069 <tr>
2070 <td class="memname">#define LCDCF_BG8800   0b00000000</td>
2071 </tr>
2072 </table>
2073 </div><div class="memdoc">
2074 <p >BG & Window Tile Data: Use 8800 Region </p>
2075
2076 </div>
2077 </div>
2078 <a id="LCDCF_BG8000" name="LCDCF_BG8000"></a>
2079 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_BG8000">◆ </a></span>LCDCF_BG8000</h2>
2080
2081 <div class="memitem">
2082 <div class="memproto">
2083 <table class="memname">
2084 <tr>
2085 <td class="memname">#define LCDCF_BG8000   0b00010000</td>
2086 </tr>
2087 </table>
2088 </div><div class="memdoc">
2089 <p >BG & Window Tile Data: Use 8000 Region </p>
2090
2091 </div>
2092 </div>
2093 <a id="LCDCF_BG9800" name="LCDCF_BG9800"></a>
2094 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_BG9800">◆ </a></span>LCDCF_BG9800</h2>
2095
2096 <div class="memitem">
2097 <div class="memproto">
2098 <table class="memname">
2099 <tr>
2100 <td class="memname">#define LCDCF_BG9800   0b00000000</td>
2101 </tr>
2102 </table>
2103 </div><div class="memdoc">
2104 <p >BG Tile Map: use 9800 Region </p>
2105
2106 </div>
2107 </div>
2108 <a id="LCDCF_BG9C00" name="LCDCF_BG9C00"></a>
2109 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_BG9C00">◆ </a></span>LCDCF_BG9C00</h2>
2110
2111 <div class="memitem">
2112 <div class="memproto">
2113 <table class="memname">
2114 <tr>
2115 <td class="memname">#define LCDCF_BG9C00   0b00001000</td>
2116 </tr>
2117 </table>
2118 </div><div class="memdoc">
2119 <p >BG Tile Map: use 9C00 Region </p>
2120
2121 </div>
2122 </div>
2123 <a id="LCDCF_OBJ8" name="LCDCF_OBJ8"></a>
2124 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_OBJ8">◆ </a></span>LCDCF_OBJ8</h2>
2125
2126 <div class="memitem">
2127 <div class="memproto">
2128 <table class="memname">
2129 <tr>
2130 <td class="memname">#define LCDCF_OBJ8   0b00000000</td>
2131 </tr>
2132 </table>
2133 </div><div class="memdoc">
2134 <p >Sprites Size: 8x8 pixels </p>
2135
2136 </div>
2137 </div>
2138 <a id="LCDCF_OBJ16" name="LCDCF_OBJ16"></a>
2139 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_OBJ16">◆ </a></span>LCDCF_OBJ16</h2>
2140
2141 <div class="memitem">
2142 <div class="memproto">
2143 <table class="memname">
2144 <tr>
2145 <td class="memname">#define LCDCF_OBJ16   0b00000100</td>
2146 </tr>
2147 </table>
2148 </div><div class="memdoc">
2149 <p >Sprites Size: 8x16 pixels </p>
2150
2151 </div>
2152 </div>
2153 <a id="LCDCF_OBJOFF" name="LCDCF_OBJOFF"></a>
2154 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_OBJOFF">◆ </a></span>LCDCF_OBJOFF</h2>
2155
2156 <div class="memitem">
2157 <div class="memproto">
2158 <table class="memname">
2159 <tr>
2160 <td class="memname">#define LCDCF_OBJOFF   0b00000000</td>
2161 </tr>
2162 </table>
2163 </div><div class="memdoc">
2164 <p >Sprites Display: Hidden </p>
2165
2166 </div>
2167 </div>
2168 <a id="LCDCF_OBJON" name="LCDCF_OBJON"></a>
2169 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_OBJON">◆ </a></span>LCDCF_OBJON</h2>
2170
2171 <div class="memitem">
2172 <div class="memproto">
2173 <table class="memname">
2174 <tr>
2175 <td class="memname">#define LCDCF_OBJON   0b00000010</td>
2176 </tr>
2177 </table>
2178 </div><div class="memdoc">
2179 <p >Sprites Display: Visible </p>
2180
2181 </div>
2182 </div>
2183 <a id="LCDCF_BGOFF" name="LCDCF_BGOFF"></a>
2184 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_BGOFF">◆ </a></span>LCDCF_BGOFF</h2>
2185
2186 <div class="memitem">
2187 <div class="memproto">
2188 <table class="memname">
2189 <tr>
2190 <td class="memname">#define LCDCF_BGOFF   0b00000000</td>
2191 </tr>
2192 </table>
2193 </div><div class="memdoc">
2194 <p >Background Display: Hidden </p>
2195
2196 </div>
2197 </div>
2198 <a id="LCDCF_BGON" name="LCDCF_BGON"></a>
2199 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_BGON">◆ </a></span>LCDCF_BGON</h2>
2200
2201 <div class="memitem">
2202 <div class="memproto">
2203 <table class="memname">
2204 <tr>
2205 <td class="memname">#define LCDCF_BGON   0b00000001</td>
2206 </tr>
2207 </table>
2208 </div><div class="memdoc">
2209 <p >Background Display: Visible </p>
2210
2211 </div>
2212 </div>
2213 <a id="LCDCF_B_ON" name="LCDCF_B_ON"></a>
2214 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_B_ON">◆ </a></span>LCDCF_B_ON</h2>
2215
2216 <div class="memitem">
2217 <div class="memproto">
2218 <table class="memname">
2219 <tr>
2220 <td class="memname">#define LCDCF_B_ON   7</td>
2221 </tr>
2222 </table>
2223 </div><div class="memdoc">
2224 <p >Bit for LCD On/Off Select </p>
2225
2226 </div>
2227 </div>
2228 <a id="LCDCF_B_WIN9C00" name="LCDCF_B_WIN9C00"></a>
2229 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_B_WIN9C00">◆ </a></span>LCDCF_B_WIN9C00</h2>
2230
2231 <div class="memitem">
2232 <div class="memproto">
2233 <table class="memname">
2234 <tr>
2235 <td class="memname">#define LCDCF_B_WIN9C00   6</td>
2236 </tr>
2237 </table>
2238 </div><div class="memdoc">
2239 <p >Bit for Window Tile Map Region Select </p>
2240
2241 </div>
2242 </div>
2243 <a id="LCDCF_B_WINON" name="LCDCF_B_WINON"></a>
2244 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_B_WINON">◆ </a></span>LCDCF_B_WINON</h2>
2245
2246 <div class="memitem">
2247 <div class="memproto">
2248 <table class="memname">
2249 <tr>
2250 <td class="memname">#define LCDCF_B_WINON   5</td>
2251 </tr>
2252 </table>
2253 </div><div class="memdoc">
2254 <p >Bit for Window Display On/Off Control </p>
2255
2256 </div>
2257 </div>
2258 <a id="LCDCF_B_BG8000" name="LCDCF_B_BG8000"></a>
2259 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_B_BG8000">◆ </a></span>LCDCF_B_BG8000</h2>
2260
2261 <div class="memitem">
2262 <div class="memproto">
2263 <table class="memname">
2264 <tr>
2265 <td class="memname">#define LCDCF_B_BG8000   4</td>
2266 </tr>
2267 </table>
2268 </div><div class="memdoc">
2269 <p >Bit for BG & Window Tile Data Region Select </p>
2270
2271 </div>
2272 </div>
2273 <a id="LCDCF_B_BG9C00" name="LCDCF_B_BG9C00"></a>
2274 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_B_BG9C00">◆ </a></span>LCDCF_B_BG9C00</h2>
2275
2276 <div class="memitem">
2277 <div class="memproto">
2278 <table class="memname">
2279 <tr>
2280 <td class="memname">#define LCDCF_B_BG9C00   3</td>
2281 </tr>
2282 </table>
2283 </div><div class="memdoc">
2284 <p >Bit for BG Tile Map Region Select </p>
2285
2286 </div>
2287 </div>
2288 <a id="LCDCF_B_OBJ16" name="LCDCF_B_OBJ16"></a>
2289 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_B_OBJ16">◆ </a></span>LCDCF_B_OBJ16</h2>
2290
2291 <div class="memitem">
2292 <div class="memproto">
2293 <table class="memname">
2294 <tr>
2295 <td class="memname">#define LCDCF_B_OBJ16   2</td>
2296 </tr>
2297 </table>
2298 </div><div class="memdoc">
2299 <p >Bit for Sprites Size Select </p>
2300
2301 </div>
2302 </div>
2303 <a id="LCDCF_B_OBJON" name="LCDCF_B_OBJON"></a>
2304 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_B_OBJON">◆ </a></span>LCDCF_B_OBJON</h2>
2305
2306 <div class="memitem">
2307 <div class="memproto">
2308 <table class="memname">
2309 <tr>
2310 <td class="memname">#define LCDCF_B_OBJON   1</td>
2311 </tr>
2312 </table>
2313 </div><div class="memdoc">
2314 <p >Bit for Sprites Display Visible/Hidden Select </p>
2315
2316 </div>
2317 </div>
2318 <a id="LCDCF_B_BGON" name="LCDCF_B_BGON"></a>
2319 <h2 class="memtitle"><span class="permalink"><a href="#LCDCF_B_BGON">◆ </a></span>LCDCF_B_BGON</h2>
2320
2321 <div class="memitem">
2322 <div class="memproto">
2323 <table class="memname">
2324 <tr>
2325 <td class="memname">#define LCDCF_B_BGON   0</td>
2326 </tr>
2327 </table>
2328 </div><div class="memdoc">
2329 <p >Bit for Background Display Visible/Hidden Select </p>
2330
2331 </div>
2332 </div>
2333 <a id="rSTAT" name="rSTAT"></a>
2334 <h2 class="memtitle"><span class="permalink"><a href="#rSTAT">◆ </a></span>rSTAT</h2>
2335
2336 <div class="memitem">
2337 <div class="memproto">
2338 <table class="memname">
2339 <tr>
2340 <td class="memname">#define rSTAT   <a class="el" href="gb_2hardware_8h.html#STAT_REG">STAT_REG</a></td>
2341 </tr>
2342 </table>
2343 </div><div class="memdoc">
2344
2345 </div>
2346 </div>
2347 <a id="STATF_LYC" name="STATF_LYC"></a>
2348 <h2 class="memtitle"><span class="permalink"><a href="#STATF_LYC">◆ </a></span>STATF_LYC</h2>
2349
2350 <div class="memitem">
2351 <div class="memproto">
2352 <table class="memname">
2353 <tr>
2354 <td class="memname">#define STATF_LYC   0b01000000</td>
2355 </tr>
2356 </table>
2357 </div><div class="memdoc">
2358 <p >STAT Interrupt: LYC=LY Coincidence Source Enable </p>
2359
2360 </div>
2361 </div>
2362 <a id="STATF_MODE10" name="STATF_MODE10"></a>
2363 <h2 class="memtitle"><span class="permalink"><a href="#STATF_MODE10">◆ </a></span>STATF_MODE10</h2>
2364
2365 <div class="memitem">
2366 <div class="memproto">
2367 <table class="memname">
2368 <tr>
2369 <td class="memname">#define STATF_MODE10   0b00100000</td>
2370 </tr>
2371 </table>
2372 </div><div class="memdoc">
2373 <p >STAT Interrupt: Mode 2 OAM Source Enable </p>
2374
2375 </div>
2376 </div>
2377 <a id="STATF_MODE01" name="STATF_MODE01"></a>
2378 <h2 class="memtitle"><span class="permalink"><a href="#STATF_MODE01">◆ </a></span>STATF_MODE01</h2>
2379
2380 <div class="memitem">
2381 <div class="memproto">
2382 <table class="memname">
2383 <tr>
2384 <td class="memname">#define STATF_MODE01   0b00010000</td>
2385 </tr>
2386 </table>
2387 </div><div class="memdoc">
2388 <p >STAT Interrupt: Mode 1 VBlank Source Enable </p>
2389
2390 </div>
2391 </div>
2392 <a id="STATF_MODE00" name="STATF_MODE00"></a>
2393 <h2 class="memtitle"><span class="permalink"><a href="#STATF_MODE00">◆ </a></span>STATF_MODE00</h2>
2394
2395 <div class="memitem">
2396 <div class="memproto">
2397 <table class="memname">
2398 <tr>
2399 <td class="memname">#define STATF_MODE00   0b00001000</td>
2400 </tr>
2401 </table>
2402 </div><div class="memdoc">
2403 <p >STAT Interrupt: Mode 0 HBlank Source Enable <br />
2404 </p>
2405
2406 </div>
2407 </div>
2408 <a id="STATF_LYCF" name="STATF_LYCF"></a>
2409 <h2 class="memtitle"><span class="permalink"><a href="#STATF_LYCF">◆ </a></span>STATF_LYCF</h2>
2410
2411 <div class="memitem">
2412 <div class="memproto">
2413 <table class="memname">
2414 <tr>
2415 <td class="memname">#define STATF_LYCF   0b00000100</td>
2416 </tr>
2417 </table>
2418 </div><div class="memdoc">
2419 <p >LYC=LY Coincidence Status Flag, Set when LY contains the same value as LYC </p>
2420
2421 </div>
2422 </div>
2423 <a id="STATF_HBL" name="STATF_HBL"></a>
2424 <h2 class="memtitle"><span class="permalink"><a href="#STATF_HBL">◆ </a></span>STATF_HBL</h2>
2425
2426 <div class="memitem">
2427 <div class="memproto">
2428 <table class="memname">
2429 <tr>
2430 <td class="memname">#define STATF_HBL   0b00000000</td>
2431 </tr>
2432 </table>
2433 </div><div class="memdoc">
2434 <p >Current LCD Mode is: 0, in H-Blank </p>
2435
2436 </div>
2437 </div>
2438 <a id="STATF_VBL" name="STATF_VBL"></a>
2439 <h2 class="memtitle"><span class="permalink"><a href="#STATF_VBL">◆ </a></span>STATF_VBL</h2>
2440
2441 <div class="memitem">
2442 <div class="memproto">
2443 <table class="memname">
2444 <tr>
2445 <td class="memname">#define STATF_VBL   0b00000001</td>
2446 </tr>
2447 </table>
2448 </div><div class="memdoc">
2449 <p >Current LCD Mode is: 1, in V-Blank </p>
2450
2451 </div>
2452 </div>
2453 <a id="STATF_OAM" name="STATF_OAM"></a>
2454 <h2 class="memtitle"><span class="permalink"><a href="#STATF_OAM">◆ </a></span>STATF_OAM</h2>
2455
2456 <div class="memitem">
2457 <div class="memproto">
2458 <table class="memname">
2459 <tr>
2460 <td class="memname">#define STATF_OAM   0b00000010</td>
2461 </tr>
2462 </table>
2463 </div><div class="memdoc">
2464 <p >Current LCD Mode is: 2, in OAM-RAM is used by system (Searching OAM) </p>
2465
2466 </div>
2467 </div>
2468 <a id="STATF_LCD" name="STATF_LCD"></a>
2469 <h2 class="memtitle"><span class="permalink"><a href="#STATF_LCD">◆ </a></span>STATF_LCD</h2>
2470
2471 <div class="memitem">
2472 <div class="memproto">
2473 <table class="memname">
2474 <tr>
2475 <td class="memname">#define STATF_LCD   0b00000011</td>
2476 </tr>
2477 </table>
2478 </div><div class="memdoc">
2479 <p >Current LCD Mode is: 3, both OAM and VRAM used by system (Transferring Data to LCD Controller) </p>
2480
2481 </div>
2482 </div>
2483 <a id="STATF_BUSY" name="STATF_BUSY"></a>
2484 <h2 class="memtitle"><span class="permalink"><a href="#STATF_BUSY">◆ </a></span>STATF_BUSY</h2>
2485
2486 <div class="memitem">
2487 <div class="memproto">
2488 <table class="memname">
2489 <tr>
2490 <td class="memname">#define STATF_BUSY   0b00000010</td>
2491 </tr>
2492 </table>
2493 </div><div class="memdoc">
2494 <p >When set, VRAM access is unsafe </p>
2495
2496 </div>
2497 </div>
2498 <a id="STATF_B_LYC" name="STATF_B_LYC"></a>
2499 <h2 class="memtitle"><span class="permalink"><a href="#STATF_B_LYC">◆ </a></span>STATF_B_LYC</h2>
2500
2501 <div class="memitem">
2502 <div class="memproto">
2503 <table class="memname">
2504 <tr>
2505 <td class="memname">#define STATF_B_LYC   6</td>
2506 </tr>
2507 </table>
2508 </div><div class="memdoc">
2509 <p >Bit for STAT Interrupt: LYC=LY Coincidence Source Enable </p>
2510
2511 </div>
2512 </div>
2513 <a id="STATF_B_MODE10" name="STATF_B_MODE10"></a>
2514 <h2 class="memtitle"><span class="permalink"><a href="#STATF_B_MODE10">◆ </a></span>STATF_B_MODE10</h2>
2515
2516 <div class="memitem">
2517 <div class="memproto">
2518 <table class="memname">
2519 <tr>
2520 <td class="memname">#define STATF_B_MODE10   5</td>
2521 </tr>
2522 </table>
2523 </div><div class="memdoc">
2524 <p >Bit for STAT Interrupt: Mode 2 OAM Source Enable </p>
2525
2526 </div>
2527 </div>
2528 <a id="STATF_B_MODE01" name="STATF_B_MODE01"></a>
2529 <h2 class="memtitle"><span class="permalink"><a href="#STATF_B_MODE01">◆ </a></span>STATF_B_MODE01</h2>
2530
2531 <div class="memitem">
2532 <div class="memproto">
2533 <table class="memname">
2534 <tr>
2535 <td class="memname">#define STATF_B_MODE01   4</td>
2536 </tr>
2537 </table>
2538 </div><div class="memdoc">
2539 <p >Bit for STAT Interrupt: Mode 1 VBlank Source Enable </p>
2540
2541 </div>
2542 </div>
2543 <a id="STATF_B_MODE00" name="STATF_B_MODE00"></a>
2544 <h2 class="memtitle"><span class="permalink"><a href="#STATF_B_MODE00">◆ </a></span>STATF_B_MODE00</h2>
2545
2546 <div class="memitem">
2547 <div class="memproto">
2548 <table class="memname">
2549 <tr>
2550 <td class="memname">#define STATF_B_MODE00   3</td>
2551 </tr>
2552 </table>
2553 </div><div class="memdoc">
2554 <p >Bit for STAT Interrupt: Mode 0 HBlank Source Enable <br />
2555 </p>
2556
2557 </div>
2558 </div>
2559 <a id="STATF_B_LYCF" name="STATF_B_LYCF"></a>
2560 <h2 class="memtitle"><span class="permalink"><a href="#STATF_B_LYCF">◆ </a></span>STATF_B_LYCF</h2>
2561
2562 <div class="memitem">
2563 <div class="memproto">
2564 <table class="memname">
2565 <tr>
2566 <td class="memname">#define STATF_B_LYCF   2</td>
2567 </tr>
2568 </table>
2569 </div><div class="memdoc">
2570 <p >Bit for LYC=LY Coincidence Status Flag </p>
2571
2572 </div>
2573 </div>
2574 <a id="STATF_B_VBL" name="STATF_B_VBL"></a>
2575 <h2 class="memtitle"><span class="permalink"><a href="#STATF_B_VBL">◆ </a></span>STATF_B_VBL</h2>
2576
2577 <div class="memitem">
2578 <div class="memproto">
2579 <table class="memname">
2580 <tr>
2581 <td class="memname">#define STATF_B_VBL   0</td>
2582 </tr>
2583 </table>
2584 </div><div class="memdoc">
2585
2586 </div>
2587 </div>
2588 <a id="STATF_B_OAM" name="STATF_B_OAM"></a>
2589 <h2 class="memtitle"><span class="permalink"><a href="#STATF_B_OAM">◆ </a></span>STATF_B_OAM</h2>
2590
2591 <div class="memitem">
2592 <div class="memproto">
2593 <table class="memname">
2594 <tr>
2595 <td class="memname">#define STATF_B_OAM   1</td>
2596 </tr>
2597 </table>
2598 </div><div class="memdoc">
2599
2600 </div>
2601 </div>
2602 <a id="STATF_B_BUSY" name="STATF_B_BUSY"></a>
2603 <h2 class="memtitle"><span class="permalink"><a href="#STATF_B_BUSY">◆ </a></span>STATF_B_BUSY</h2>
2604
2605 <div class="memitem">
2606 <div class="memproto">
2607 <table class="memname">
2608 <tr>
2609 <td class="memname">#define STATF_B_BUSY   1</td>
2610 </tr>
2611 </table>
2612 </div><div class="memdoc">
2613 <p >Bit for when VRAM access is unsafe </p>
2614
2615 </div>
2616 </div>
2617 <a id="rSCY" name="rSCY"></a>
2618 <h2 class="memtitle"><span class="permalink"><a href="#rSCY">◆ </a></span>rSCY</h2>
2619
2620 <div class="memitem">
2621 <div class="memproto">
2622 <table class="memname">
2623 <tr>
2624 <td class="memname">#define rSCY</td>
2625 </tr>
2626 </table>
2627 </div><div class="memdoc">
2628
2629 </div>
2630 </div>
2631 <a id="rSCX" name="rSCX"></a>
2632 <h2 class="memtitle"><span class="permalink"><a href="#rSCX">◆ </a></span>rSCX</h2>
2633
2634 <div class="memitem">
2635 <div class="memproto">
2636 <table class="memname">
2637 <tr>
2638 <td class="memname">#define rSCX   <a class="el" href="gb_2hardware_8h.html#SCX_REG">SCX_REG</a></td>
2639 </tr>
2640 </table>
2641 </div><div class="memdoc">
2642
2643 </div>
2644 </div>
2645 <a id="rLY" name="rLY"></a>
2646 <h2 class="memtitle"><span class="permalink"><a href="#rLY">◆ </a></span>rLY</h2>
2647
2648 <div class="memitem">
2649 <div class="memproto">
2650 <table class="memname">
2651 <tr>
2652 <td class="memname">#define rLY   <a class="el" href="gb_2hardware_8h.html#LY_REG">LY_REG</a></td>
2653 </tr>
2654 </table>
2655 </div><div class="memdoc">
2656
2657 </div>
2658 </div>
2659 <a id="rLYC" name="rLYC"></a>
2660 <h2 class="memtitle"><span class="permalink"><a href="#rLYC">◆ </a></span>rLYC</h2>
2661
2662 <div class="memitem">
2663 <div class="memproto">
2664 <table class="memname">
2665 <tr>
2666 <td class="memname">#define rLYC   <a class="el" href="gb_2hardware_8h.html#LYC_REG">LYC_REG</a></td>
2667 </tr>
2668 </table>
2669 </div><div class="memdoc">
2670
2671 </div>
2672 </div>
2673 <a id="rDMA" name="rDMA"></a>
2674 <h2 class="memtitle"><span class="permalink"><a href="#rDMA">◆ </a></span>rDMA</h2>
2675
2676 <div class="memitem">
2677 <div class="memproto">
2678 <table class="memname">
2679 <tr>
2680 <td class="memname">#define rDMA   <a class="el" href="gb_2hardware_8h.html#DMA_REG">DMA_REG</a></td>
2681 </tr>
2682 </table>
2683 </div><div class="memdoc">
2684
2685 </div>
2686 </div>
2687 <a id="rBGP" name="rBGP"></a>
2688 <h2 class="memtitle"><span class="permalink"><a href="#rBGP">◆ </a></span>rBGP</h2>
2689
2690 <div class="memitem">
2691 <div class="memproto">
2692 <table class="memname">
2693 <tr>
2694 <td class="memname">#define rBGP   <a class="el" href="gb_2hardware_8h.html#BGP_REG">BGP_REG</a></td>
2695 </tr>
2696 </table>
2697 </div><div class="memdoc">
2698
2699 </div>
2700 </div>
2701 <a id="rOBP0" name="rOBP0"></a>
2702 <h2 class="memtitle"><span class="permalink"><a href="#rOBP0">◆ </a></span>rOBP0</h2>
2703
2704 <div class="memitem">
2705 <div class="memproto">
2706 <table class="memname">
2707 <tr>
2708 <td class="memname">#define rOBP0   <a class="el" href="gb_2hardware_8h.html#OBP0_REG">OBP0_REG</a></td>
2709 </tr>
2710 </table>
2711 </div><div class="memdoc">
2712
2713 </div>
2714 </div>
2715 <a id="rOBP1" name="rOBP1"></a>
2716 <h2 class="memtitle"><span class="permalink"><a href="#rOBP1">◆ </a></span>rOBP1</h2>
2717
2718 <div class="memitem">
2719 <div class="memproto">
2720 <table class="memname">
2721 <tr>
2722 <td class="memname">#define rOBP1   <a class="el" href="gb_2hardware_8h.html#OBP1_REG">OBP1_REG</a></td>
2723 </tr>
2724 </table>
2725 </div><div class="memdoc">
2726
2727 </div>
2728 </div>
2729 <a id="rWY" name="rWY"></a>
2730 <h2 class="memtitle"><span class="permalink"><a href="#rWY">◆ </a></span>rWY</h2>
2731
2732 <div class="memitem">
2733 <div class="memproto">
2734 <table class="memname">
2735 <tr>
2736 <td class="memname">#define rWY   <a class="el" href="gb_2hardware_8h.html#WY_REG">WY_REG</a></td>
2737 </tr>
2738 </table>
2739 </div><div class="memdoc">
2740
2741 </div>
2742 </div>
2743 <a id="rWX" name="rWX"></a>
2744 <h2 class="memtitle"><span class="permalink"><a href="#rWX">◆ </a></span>rWX</h2>
2745
2746 <div class="memitem">
2747 <div class="memproto">
2748 <table class="memname">
2749 <tr>
2750 <td class="memname">#define rWX   <a class="el" href="gb_2hardware_8h.html#WX_REG">WX_REG</a></td>
2751 </tr>
2752 </table>
2753 </div><div class="memdoc">
2754
2755 </div>
2756 </div>
2757 <a id="rKEY1" name="rKEY1"></a>
2758 <h2 class="memtitle"><span class="permalink"><a href="#rKEY1">◆ </a></span>rKEY1</h2>
2759
2760 <div class="memitem">
2761 <div class="memproto">
2762 <table class="memname">
2763 <tr>
2764 <td class="memname">#define rKEY1   <a class="el" href="gb_2hardware_8h.html#KEY1_REG">KEY1_REG</a></td>
2765 </tr>
2766 </table>
2767 </div><div class="memdoc">
2768
2769 </div>
2770 </div>
2771 <a id="rSPD" name="rSPD"></a>
2772 <h2 class="memtitle"><span class="permalink"><a href="#rSPD">◆ </a></span>rSPD</h2>
2773
2774 <div class="memitem">
2775 <div class="memproto">
2776 <table class="memname">
2777 <tr>
2778 <td class="memname">#define rSPD   <a class="el" href="gb_2hardware_8h.html#KEY1_REG">KEY1_REG</a></td>
2779 </tr>
2780 </table>
2781 </div><div class="memdoc">
2782
2783 </div>
2784 </div>
2785 <a id="KEY1F_DBLSPEED" name="KEY1F_DBLSPEED"></a>
2786 <h2 class="memtitle"><span class="permalink"><a href="#KEY1F_DBLSPEED">◆ </a></span>KEY1F_DBLSPEED</h2>
2787
2788 <div class="memitem">
2789 <div class="memproto">
2790 <table class="memname">
2791 <tr>
2792 <td class="memname">#define KEY1F_DBLSPEED   0b10000000</td>
2793 </tr>
2794 </table>
2795 </div><div class="memdoc">
2796
2797 </div>
2798 </div>
2799 <a id="KEY1F_PREPARE" name="KEY1F_PREPARE"></a>
2800 <h2 class="memtitle"><span class="permalink"><a href="#KEY1F_PREPARE">◆ </a></span>KEY1F_PREPARE</h2>
2801
2802 <div class="memitem">
2803 <div class="memproto">
2804 <table class="memname">
2805 <tr>
2806 <td class="memname">#define KEY1F_PREPARE   0b00000001</td>
2807 </tr>
2808 </table>
2809 </div><div class="memdoc">
2810
2811 </div>
2812 </div>
2813 <a id="rVBK" name="rVBK"></a>
2814 <h2 class="memtitle"><span class="permalink"><a href="#rVBK">◆ </a></span>rVBK</h2>
2815
2816 <div class="memitem">
2817 <div class="memproto">
2818 <table class="memname">
2819 <tr>
2820 <td class="memname">#define rVBK   <a class="el" href="gb_2hardware_8h.html#VBK_REG">VBK_REG</a></td>
2821 </tr>
2822 </table>
2823 </div><div class="memdoc">
2824
2825 </div>
2826 </div>
2827 <a id="VBK_BANK_0" name="VBK_BANK_0"></a>
2828 <h2 class="memtitle"><span class="permalink"><a href="#VBK_BANK_0">◆ </a></span>VBK_BANK_0</h2>
2829
2830 <div class="memitem">
2831 <div class="memproto">
2832 <table class="memname">
2833 <tr>
2834 <td class="memname">#define VBK_BANK_0   0</td>
2835 </tr>
2836 </table>
2837 </div><div class="memdoc">
2838 <p >Select Regular Map and Normal Tiles (CGB Mode Only) </p>
2839
2840 </div>
2841 </div>
2842 <a id="VBK_TILES" name="VBK_TILES"></a>
2843 <h2 class="memtitle"><span class="permalink"><a href="#VBK_TILES">◆ </a></span>VBK_TILES</h2>
2844
2845 <div class="memitem">
2846 <div class="memproto">
2847 <table class="memname">
2848 <tr>
2849 <td class="memname">#define VBK_TILES   0</td>
2850 </tr>
2851 </table>
2852 </div><div class="memdoc">
2853 <p >Select Regular Map and Normal Tiles (CGB Mode Only) </p>
2854
2855 </div>
2856 </div>
2857 <a id="VBK_BANK_1" name="VBK_BANK_1"></a>
2858 <h2 class="memtitle"><span class="permalink"><a href="#VBK_BANK_1">◆ </a></span>VBK_BANK_1</h2>
2859
2860 <div class="memitem">
2861 <div class="memproto">
2862 <table class="memname">
2863 <tr>
2864 <td class="memname">#define VBK_BANK_1   1</td>
2865 </tr>
2866 </table>
2867 </div><div class="memdoc">
2868 <p >Select Map Attributes and Extra Tile Bank (CGB Mode Only) </p>
2869
2870 </div>
2871 </div>
2872 <a id="VBK_ATTRIBUTES" name="VBK_ATTRIBUTES"></a>
2873 <h2 class="memtitle"><span class="permalink"><a href="#VBK_ATTRIBUTES">◆ </a></span>VBK_ATTRIBUTES</h2>
2874
2875 <div class="memitem">
2876 <div class="memproto">
2877 <table class="memname">
2878 <tr>
2879 <td class="memname">#define VBK_ATTRIBUTES   1</td>
2880 </tr>
2881 </table>
2882 </div><div class="memdoc">
2883 <p >Select Map Attributes and Extra Tile Bank (CGB Mode Only) </p>
2884
2885 </div>
2886 </div>
2887 <a id="BKGF_PRI" name="BKGF_PRI"></a>
2888 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_PRI">◆ </a></span>BKGF_PRI</h2>
2889
2890 <div class="memitem">
2891 <div class="memproto">
2892 <table class="memname">
2893 <tr>
2894 <td class="memname">#define BKGF_PRI   0b10000000</td>
2895 </tr>
2896 </table>
2897 </div><div class="memdoc">
2898 <p >Background CGB BG and Window over Sprite priority Enabled </p>
2899
2900 </div>
2901 </div>
2902 <a id="BKGF_YFLIP" name="BKGF_YFLIP"></a>
2903 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_YFLIP">◆ </a></span>BKGF_YFLIP</h2>
2904
2905 <div class="memitem">
2906 <div class="memproto">
2907 <table class="memname">
2908 <tr>
2909 <td class="memname">#define BKGF_YFLIP   0b01000000</td>
2910 </tr>
2911 </table>
2912 </div><div class="memdoc">
2913 <p >Background CGB Y axis flip: Vertically mirrored </p>
2914
2915 </div>
2916 </div>
2917 <a id="BKGF_XFLIP" name="BKGF_XFLIP"></a>
2918 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_XFLIP">◆ </a></span>BKGF_XFLIP</h2>
2919
2920 <div class="memitem">
2921 <div class="memproto">
2922 <table class="memname">
2923 <tr>
2924 <td class="memname">#define BKGF_XFLIP   0b00100000</td>
2925 </tr>
2926 </table>
2927 </div><div class="memdoc">
2928 <p >Background CGB X axis flip: Horizontally mirrored </p>
2929
2930 </div>
2931 </div>
2932 <a id="BKGF_BANK0" name="BKGF_BANK0"></a>
2933 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_BANK0">◆ </a></span>BKGF_BANK0</h2>
2934
2935 <div class="memitem">
2936 <div class="memproto">
2937 <table class="memname">
2938 <tr>
2939 <td class="memname">#define BKGF_BANK0   0b00000000</td>
2940 </tr>
2941 </table>
2942 </div><div class="memdoc">
2943 <p >Background CGB Tile VRAM-Bank: Use Bank 0 (CGB Mode Only) </p>
2944
2945 </div>
2946 </div>
2947 <a id="BKGF_BANK1" name="BKGF_BANK1"></a>
2948 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_BANK1">◆ </a></span>BKGF_BANK1</h2>
2949
2950 <div class="memitem">
2951 <div class="memproto">
2952 <table class="memname">
2953 <tr>
2954 <td class="memname">#define BKGF_BANK1   0b00001000</td>
2955 </tr>
2956 </table>
2957 </div><div class="memdoc">
2958 <p >Background CGB Tile VRAM-Bank: Use Bank 1 (CGB Mode Only) </p>
2959
2960 </div>
2961 </div>
2962 <a id="BKGF_CGB_PAL0" name="BKGF_CGB_PAL0"></a>
2963 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_CGB_PAL0">◆ </a></span>BKGF_CGB_PAL0</h2>
2964
2965 <div class="memitem">
2966 <div class="memproto">
2967 <table class="memname">
2968 <tr>
2969 <td class="memname">#define BKGF_CGB_PAL0   0b00000000</td>
2970 </tr>
2971 </table>
2972 </div><div class="memdoc">
2973 <p >Background CGB Palette number (CGB Mode Only) </p>
2974
2975 </div>
2976 </div>
2977 <a id="BKGF_CGB_PAL1" name="BKGF_CGB_PAL1"></a>
2978 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_CGB_PAL1">◆ </a></span>BKGF_CGB_PAL1</h2>
2979
2980 <div class="memitem">
2981 <div class="memproto">
2982 <table class="memname">
2983 <tr>
2984 <td class="memname">#define BKGF_CGB_PAL1   0b00000001</td>
2985 </tr>
2986 </table>
2987 </div><div class="memdoc">
2988 <p >Background CGB Palette number (CGB Mode Only) </p>
2989
2990 </div>
2991 </div>
2992 <a id="BKGF_CGB_PAL2" name="BKGF_CGB_PAL2"></a>
2993 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_CGB_PAL2">◆ </a></span>BKGF_CGB_PAL2</h2>
2994
2995 <div class="memitem">
2996 <div class="memproto">
2997 <table class="memname">
2998 <tr>
2999 <td class="memname">#define BKGF_CGB_PAL2   0b00000010</td>
3000 </tr>
3001 </table>
3002 </div><div class="memdoc">
3003 <p >Background CGB Palette number (CGB Mode Only) </p>
3004
3005 </div>
3006 </div>
3007 <a id="BKGF_CGB_PAL3" name="BKGF_CGB_PAL3"></a>
3008 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_CGB_PAL3">◆ </a></span>BKGF_CGB_PAL3</h2>
3009
3010 <div class="memitem">
3011 <div class="memproto">
3012 <table class="memname">
3013 <tr>
3014 <td class="memname">#define BKGF_CGB_PAL3   0b00000011</td>
3015 </tr>
3016 </table>
3017 </div><div class="memdoc">
3018 <p >Background CGB Palette number (CGB Mode Only) </p>
3019
3020 </div>
3021 </div>
3022 <a id="BKGF_CGB_PAL4" name="BKGF_CGB_PAL4"></a>
3023 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_CGB_PAL4">◆ </a></span>BKGF_CGB_PAL4</h2>
3024
3025 <div class="memitem">
3026 <div class="memproto">
3027 <table class="memname">
3028 <tr>
3029 <td class="memname">#define BKGF_CGB_PAL4   0b00000100</td>
3030 </tr>
3031 </table>
3032 </div><div class="memdoc">
3033 <p >Background CGB Palette number (CGB Mode Only) </p>
3034
3035 </div>
3036 </div>
3037 <a id="BKGF_CGB_PAL5" name="BKGF_CGB_PAL5"></a>
3038 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_CGB_PAL5">◆ </a></span>BKGF_CGB_PAL5</h2>
3039
3040 <div class="memitem">
3041 <div class="memproto">
3042 <table class="memname">
3043 <tr>
3044 <td class="memname">#define BKGF_CGB_PAL5   0b00000101</td>
3045 </tr>
3046 </table>
3047 </div><div class="memdoc">
3048 <p >Background CGB Palette number (CGB Mode Only) </p>
3049
3050 </div>
3051 </div>
3052 <a id="BKGF_CGB_PAL6" name="BKGF_CGB_PAL6"></a>
3053 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_CGB_PAL6">◆ </a></span>BKGF_CGB_PAL6</h2>
3054
3055 <div class="memitem">
3056 <div class="memproto">
3057 <table class="memname">
3058 <tr>
3059 <td class="memname">#define BKGF_CGB_PAL6   0b00000110</td>
3060 </tr>
3061 </table>
3062 </div><div class="memdoc">
3063 <p >Background CGB Palette number (CGB Mode Only) </p>
3064
3065 </div>
3066 </div>
3067 <a id="BKGF_CGB_PAL7" name="BKGF_CGB_PAL7"></a>
3068 <h2 class="memtitle"><span class="permalink"><a href="#BKGF_CGB_PAL7">◆ </a></span>BKGF_CGB_PAL7</h2>
3069
3070 <div class="memitem">
3071 <div class="memproto">
3072 <table class="memname">
3073 <tr>
3074 <td class="memname">#define BKGF_CGB_PAL7   0b00000111</td>
3075 </tr>
3076 </table>
3077 </div><div class="memdoc">
3078 <p >Background CGB Palette number (CGB Mode Only) </p>
3079
3080 </div>
3081 </div>
3082 <a id="rHDMA1" name="rHDMA1"></a>
3083 <h2 class="memtitle"><span class="permalink"><a href="#rHDMA1">◆ </a></span>rHDMA1</h2>
3084
3085 <div class="memitem">
3086 <div class="memproto">
3087 <table class="memname">
3088 <tr>
3089 <td class="memname">#define rHDMA1   <a class="el" href="gb_2hardware_8h.html#HDMA1_REG">HDMA1_REG</a></td>
3090 </tr>
3091 </table>
3092 </div><div class="memdoc">
3093
3094 </div>
3095 </div>
3096 <a id="rHDMA2" name="rHDMA2"></a>
3097 <h2 class="memtitle"><span class="permalink"><a href="#rHDMA2">◆ </a></span>rHDMA2</h2>
3098
3099 <div class="memitem">
3100 <div class="memproto">
3101 <table class="memname">
3102 <tr>
3103 <td class="memname">#define rHDMA2   <a class="el" href="gb_2hardware_8h.html#HDMA2_REG">HDMA2_REG</a></td>
3104 </tr>
3105 </table>
3106 </div><div class="memdoc">
3107
3108 </div>
3109 </div>
3110 <a id="rHDMA3" name="rHDMA3"></a>
3111 <h2 class="memtitle"><span class="permalink"><a href="#rHDMA3">◆ </a></span>rHDMA3</h2>
3112
3113 <div class="memitem">
3114 <div class="memproto">
3115 <table class="memname">
3116 <tr>
3117 <td class="memname">#define rHDMA3   <a class="el" href="gb_2hardware_8h.html#HDMA3_REG">HDMA3_REG</a></td>
3118 </tr>
3119 </table>
3120 </div><div class="memdoc">
3121
3122 </div>
3123 </div>
3124 <a id="rHDMA4" name="rHDMA4"></a>
3125 <h2 class="memtitle"><span class="permalink"><a href="#rHDMA4">◆ </a></span>rHDMA4</h2>
3126
3127 <div class="memitem">
3128 <div class="memproto">
3129 <table class="memname">
3130 <tr>
3131 <td class="memname">#define rHDMA4   <a class="el" href="gb_2hardware_8h.html#HDMA4_REG">HDMA4_REG</a></td>
3132 </tr>
3133 </table>
3134 </div><div class="memdoc">
3135
3136 </div>
3137 </div>
3138 <a id="rHDMA5" name="rHDMA5"></a>
3139 <h2 class="memtitle"><span class="permalink"><a href="#rHDMA5">◆ </a></span>rHDMA5</h2>
3140
3141 <div class="memitem">
3142 <div class="memproto">
3143 <table class="memname">
3144 <tr>
3145 <td class="memname">#define rHDMA5   <a class="el" href="gb_2hardware_8h.html#HDMA5_REG">HDMA5_REG</a></td>
3146 </tr>
3147 </table>
3148 </div><div class="memdoc">
3149
3150 </div>
3151 </div>
3152 <a id="HDMA5F_MODE_GP" name="HDMA5F_MODE_GP"></a>
3153 <h2 class="memtitle"><span class="permalink"><a href="#HDMA5F_MODE_GP">◆ </a></span>HDMA5F_MODE_GP</h2>
3154
3155 <div class="memitem">
3156 <div class="memproto">
3157 <table class="memname">
3158 <tr>
3159 <td class="memname">#define HDMA5F_MODE_GP   0b00000000</td>
3160 </tr>
3161 </table>
3162 </div><div class="memdoc">
3163
3164 </div>
3165 </div>
3166 <a id="HDMA5F_MODE_HBL" name="HDMA5F_MODE_HBL"></a>
3167 <h2 class="memtitle"><span class="permalink"><a href="#HDMA5F_MODE_HBL">◆ </a></span>HDMA5F_MODE_HBL</h2>
3168
3169 <div class="memitem">
3170 <div class="memproto">
3171 <table class="memname">
3172 <tr>
3173 <td class="memname">#define HDMA5F_MODE_HBL   0b10000000</td>
3174 </tr>
3175 </table>
3176 </div><div class="memdoc">
3177
3178 </div>
3179 </div>
3180 <a id="HDMA5F_BUSY" name="HDMA5F_BUSY"></a>
3181 <h2 class="memtitle"><span class="permalink"><a href="#HDMA5F_BUSY">◆ </a></span>HDMA5F_BUSY</h2>
3182
3183 <div class="memitem">
3184 <div class="memproto">
3185 <table class="memname">
3186 <tr>
3187 <td class="memname">#define HDMA5F_BUSY   0b10000000</td>
3188 </tr>
3189 </table>
3190 </div><div class="memdoc">
3191
3192 </div>
3193 </div>
3194 <a id="rRP" name="rRP"></a>
3195 <h2 class="memtitle"><span class="permalink"><a href="#rRP">◆ </a></span>rRP</h2>
3196
3197 <div class="memitem">
3198 <div class="memproto">
3199 <table class="memname">
3200 <tr>
3201 <td class="memname">#define rRP   <a class="el" href="gb_2hardware_8h.html#RP_REG">RP_REG</a></td>
3202 </tr>
3203 </table>
3204 </div><div class="memdoc">
3205
3206 </div>
3207 </div>
3208 <a id="RPF_ENREAD" name="RPF_ENREAD"></a>
3209 <h2 class="memtitle"><span class="permalink"><a href="#RPF_ENREAD">◆ </a></span>RPF_ENREAD</h2>
3210
3211 <div class="memitem">
3212 <div class="memproto">
3213 <table class="memname">
3214 <tr>
3215 <td class="memname">#define RPF_ENREAD   0b11000000</td>
3216 </tr>
3217 </table>
3218 </div><div class="memdoc">
3219
3220 </div>
3221 </div>
3222 <a id="RPF_DATAIN" name="RPF_DATAIN"></a>
3223 <h2 class="memtitle"><span class="permalink"><a href="#RPF_DATAIN">◆ </a></span>RPF_DATAIN</h2>
3224
3225 <div class="memitem">
3226 <div class="memproto">
3227 <table class="memname">
3228 <tr>
3229 <td class="memname">#define RPF_DATAIN   0b00000010</td>
3230 </tr>
3231 </table>
3232 </div><div class="memdoc">
3233
3234 </div>
3235 </div>
3236 <a id="RPF_WRITE_HI" name="RPF_WRITE_HI"></a>
3237 <h2 class="memtitle"><span class="permalink"><a href="#RPF_WRITE_HI">◆ </a></span>RPF_WRITE_HI</h2>
3238
3239 <div class="memitem">
3240 <div class="memproto">
3241 <table class="memname">
3242 <tr>
3243 <td class="memname">#define RPF_WRITE_HI   0b00000001</td>
3244 </tr>
3245 </table>
3246 </div><div class="memdoc">
3247
3248 </div>
3249 </div>
3250 <a id="RPF_WRITE_LO" name="RPF_WRITE_LO"></a>
3251 <h2 class="memtitle"><span class="permalink"><a href="#RPF_WRITE_LO">◆ </a></span>RPF_WRITE_LO</h2>
3252
3253 <div class="memitem">
3254 <div class="memproto">
3255 <table class="memname">
3256 <tr>
3257 <td class="memname">#define RPF_WRITE_LO   0b00000000</td>
3258 </tr>
3259 </table>
3260 </div><div class="memdoc">
3261
3262 </div>
3263 </div>
3264 <a id="rBCPS" name="rBCPS"></a>
3265 <h2 class="memtitle"><span class="permalink"><a href="#rBCPS">◆ </a></span>rBCPS</h2>
3266
3267 <div class="memitem">
3268 <div class="memproto">
3269 <table class="memname">
3270 <tr>
3271 <td class="memname">#define rBCPS   <a class="el" href="gb_2hardware_8h.html#BCPS_REG">BCPS_REG</a></td>
3272 </tr>
3273 </table>
3274 </div><div class="memdoc">
3275
3276 </div>
3277 </div>
3278 <a id="BCPSF_AUTOINC" name="BCPSF_AUTOINC"></a>
3279 <h2 class="memtitle"><span class="permalink"><a href="#BCPSF_AUTOINC">◆ </a></span>BCPSF_AUTOINC</h2>
3280
3281 <div class="memitem">
3282 <div class="memproto">
3283 <table class="memname">
3284 <tr>
3285 <td class="memname">#define BCPSF_AUTOINC   0b10000000</td>
3286 </tr>
3287 </table>
3288 </div><div class="memdoc">
3289
3290 </div>
3291 </div>
3292 <a id="rBCPD" name="rBCPD"></a>
3293 <h2 class="memtitle"><span class="permalink"><a href="#rBCPD">◆ </a></span>rBCPD</h2>
3294
3295 <div class="memitem">
3296 <div class="memproto">
3297 <table class="memname">
3298 <tr>
3299 <td class="memname">#define rBCPD   <a class="el" href="gb_2hardware_8h.html#BCPD_REG">BCPD_REG</a></td>
3300 </tr>
3301 </table>
3302 </div><div class="memdoc">
3303
3304 </div>
3305 </div>
3306 <a id="rOCPS" name="rOCPS"></a>
3307 <h2 class="memtitle"><span class="permalink"><a href="#rOCPS">◆ </a></span>rOCPS</h2>
3308
3309 <div class="memitem">
3310 <div class="memproto">
3311 <table class="memname">
3312 <tr>
3313 <td class="memname">#define rOCPS   <a class="el" href="gb_2hardware_8h.html#OCPS_REG">OCPS_REG</a></td>
3314 </tr>
3315 </table>
3316 </div><div class="memdoc">
3317
3318 </div>
3319 </div>
3320 <a id="OCPSF_AUTOINC" name="OCPSF_AUTOINC"></a>
3321 <h2 class="memtitle"><span class="permalink"><a href="#OCPSF_AUTOINC">◆ </a></span>OCPSF_AUTOINC</h2>
3322
3323 <div class="memitem">
3324 <div class="memproto">
3325 <table class="memname">
3326 <tr>
3327 <td class="memname">#define OCPSF_AUTOINC   0b10000000</td>
3328 </tr>
3329 </table>
3330 </div><div class="memdoc">
3331
3332 </div>
3333 </div>
3334 <a id="rOCPD" name="rOCPD"></a>
3335 <h2 class="memtitle"><span class="permalink"><a href="#rOCPD">◆ </a></span>rOCPD</h2>
3336
3337 <div class="memitem">
3338 <div class="memproto">
3339 <table class="memname">
3340 <tr>
3341 <td class="memname">#define rOCPD   <a class="el" href="gb_2hardware_8h.html#OCPD_REG">OCPD_REG</a></td>
3342 </tr>
3343 </table>
3344 </div><div class="memdoc">
3345
3346 </div>
3347 </div>
3348 <a id="rSVBK" name="rSVBK"></a>
3349 <h2 class="memtitle"><span class="permalink"><a href="#rSVBK">◆ </a></span>rSVBK</h2>
3350
3351 <div class="memitem">
3352 <div class="memproto">
3353 <table class="memname">
3354 <tr>
3355 <td class="memname">#define rSVBK   <a class="el" href="gb_2hardware_8h.html#SVBK_REG">SVBK_REG</a></td>
3356 </tr>
3357 </table>
3358 </div><div class="memdoc">
3359
3360 </div>
3361 </div>
3362 <a id="rSMBK" name="rSMBK"></a>
3363 <h2 class="memtitle"><span class="permalink"><a href="#rSMBK">◆ </a></span>rSMBK</h2>
3364
3365 <div class="memitem">
3366 <div class="memproto">
3367 <table class="memname">
3368 <tr>
3369 <td class="memname">#define rSMBK   <a class="el" href="gb_2hardware_8h.html#SVBK_REG">SVBK_REG</a></td>
3370 </tr>
3371 </table>
3372 </div><div class="memdoc">
3373
3374 </div>
3375 </div>
3376 <a id="rPCM12" name="rPCM12"></a>
3377 <h2 class="memtitle"><span class="permalink"><a href="#rPCM12">◆ </a></span>rPCM12</h2>
3378
3379 <div class="memitem">
3380 <div class="memproto">
3381 <table class="memname">
3382 <tr>
3383 <td class="memname">#define rPCM12   <a class="el" href="gb_2hardware_8h.html#PCM12_REG">PCM12_REG</a></td>
3384 </tr>
3385 </table>
3386 </div><div class="memdoc">
3387
3388 </div>
3389 </div>
3390 <a id="rPCM34" name="rPCM34"></a>
3391 <h2 class="memtitle"><span class="permalink"><a href="#rPCM34">◆ </a></span>rPCM34</h2>
3392
3393 <div class="memitem">
3394 <div class="memproto">
3395 <table class="memname">
3396 <tr>
3397 <td class="memname">#define rPCM34   <a class="el" href="gb_2hardware_8h.html#PCM34_REG">PCM34_REG</a></td>
3398 </tr>
3399 </table>
3400 </div><div class="memdoc">
3401
3402 </div>
3403 </div>
3404 <a id="rIE" name="rIE"></a>
3405 <h2 class="memtitle"><span class="permalink"><a href="#rIE">◆ </a></span>rIE</h2>
3406
3407 <div class="memitem">
3408 <div class="memproto">
3409 <table class="memname">
3410 <tr>
3411 <td class="memname">#define rIE   <a class="el" href="gb_2hardware_8h.html#IE_REG">IE_REG</a></td>
3412 </tr>
3413 </table>
3414 </div><div class="memdoc">
3415
3416 </div>
3417 </div>
3418 <a id="IEF_HILO" name="IEF_HILO"></a>
3419 <h2 class="memtitle"><span class="permalink"><a href="#IEF_HILO">◆ </a></span>IEF_HILO</h2>
3420
3421 <div class="memitem">
3422 <div class="memproto">
3423 <table class="memname">
3424 <tr>
3425 <td class="memname">#define IEF_HILO   0b00010000</td>
3426 </tr>
3427 </table>
3428 </div><div class="memdoc">
3429 <p >Joypad interrupt enable flag </p>
3430
3431 </div>
3432 </div>
3433 <a id="IEF_SERIAL" name="IEF_SERIAL"></a>
3434 <h2 class="memtitle"><span class="permalink"><a href="#IEF_SERIAL">◆ </a></span>IEF_SERIAL</h2>
3435
3436 <div class="memitem">
3437 <div class="memproto">
3438 <table class="memname">
3439 <tr>
3440 <td class="memname">#define IEF_SERIAL   0b00001000</td>
3441 </tr>
3442 </table>
3443 </div><div class="memdoc">
3444 <p >Serial interrupt enable flag </p>
3445
3446 </div>
3447 </div>
3448 <a id="IEF_TIMER" name="IEF_TIMER"></a>
3449 <h2 class="memtitle"><span class="permalink"><a href="#IEF_TIMER">◆ </a></span>IEF_TIMER</h2>
3450
3451 <div class="memitem">
3452 <div class="memproto">
3453 <table class="memname">
3454 <tr>
3455 <td class="memname">#define IEF_TIMER   0b00000100</td>
3456 </tr>
3457 </table>
3458 </div><div class="memdoc">
3459 <p >Timer interrupt enable flag </p>
3460
3461 </div>
3462 </div>
3463 <a id="IEF_STAT" name="IEF_STAT"></a>
3464 <h2 class="memtitle"><span class="permalink"><a href="#IEF_STAT">◆ </a></span>IEF_STAT</h2>
3465
3466 <div class="memitem">
3467 <div class="memproto">
3468 <table class="memname">
3469 <tr>
3470 <td class="memname">#define IEF_STAT   0b00000010</td>
3471 </tr>
3472 </table>
3473 </div><div class="memdoc">
3474 <p >Stat interrupt enable flag </p>
3475
3476 </div>
3477 </div>
3478 <a id="IEF_VBLANK" name="IEF_VBLANK"></a>
3479 <h2 class="memtitle"><span class="permalink"><a href="#IEF_VBLANK">◆ </a></span>IEF_VBLANK</h2>
3480
3481 <div class="memitem">
3482 <div class="memproto">
3483 <table class="memname">
3484 <tr>
3485 <td class="memname">#define IEF_VBLANK   0b00000001</td>
3486 </tr>
3487 </table>
3488 </div><div class="memdoc">
3489 <p >VBlank interrupt enable flag </p>
3490
3491 </div>
3492 </div>
3493 <a id="AUDLEN_DUTY_12_5" name="AUDLEN_DUTY_12_5"></a>
3494 <h2 class="memtitle"><span class="permalink"><a href="#AUDLEN_DUTY_12_5">◆ </a></span>AUDLEN_DUTY_12_5</h2>
3495
3496 <div class="memitem">
3497 <div class="memproto">
3498 <table class="memname">
3499 <tr>
3500 <td class="memname">#define AUDLEN_DUTY_12_5   0b00000000</td>
3501 </tr>
3502 </table>
3503 </div><div class="memdoc">
3504
3505 </div>
3506 </div>
3507 <a id="AUDLEN_DUTY_25" name="AUDLEN_DUTY_25"></a>
3508 <h2 class="memtitle"><span class="permalink"><a href="#AUDLEN_DUTY_25">◆ </a></span>AUDLEN_DUTY_25</h2>
3509
3510 <div class="memitem">
3511 <div class="memproto">
3512 <table class="memname">
3513 <tr>
3514 <td class="memname">#define AUDLEN_DUTY_25   0b01000000</td>
3515 </tr>
3516 </table>
3517 </div><div class="memdoc">
3518
3519 </div>
3520 </div>
3521 <a id="AUDLEN_DUTY_50" name="AUDLEN_DUTY_50"></a>
3522 <h2 class="memtitle"><span class="permalink"><a href="#AUDLEN_DUTY_50">◆ </a></span>AUDLEN_DUTY_50</h2>
3523
3524 <div class="memitem">
3525 <div class="memproto">
3526 <table class="memname">
3527 <tr>
3528 <td class="memname">#define AUDLEN_DUTY_50   0b10000000</td>
3529 </tr>
3530 </table>
3531 </div><div class="memdoc">
3532
3533 </div>
3534 </div>
3535 <a id="AUDLEN_DUTY_75" name="AUDLEN_DUTY_75"></a>
3536 <h2 class="memtitle"><span class="permalink"><a href="#AUDLEN_DUTY_75">◆ </a></span>AUDLEN_DUTY_75</h2>
3537
3538 <div class="memitem">
3539 <div class="memproto">
3540 <table class="memname">
3541 <tr>
3542 <td class="memname">#define AUDLEN_DUTY_75   0b11000000</td>
3543 </tr>
3544 </table>
3545 </div><div class="memdoc">
3546
3547 </div>
3548 </div>
3549 <a id="AUDLEN_LENGTH" name="AUDLEN_LENGTH"></a>
3550 <h2 class="memtitle"><span class="permalink"><a href="#AUDLEN_LENGTH">◆ </a></span>AUDLEN_LENGTH</h2>
3551
3552 <div class="memitem">
3553 <div class="memproto">
3554 <table class="memname">
3555 <tr>
3556 <td class="memname">#define AUDLEN_LENGTH</td>
3557 <td>(</td>
3558 <td class="paramtype"> </td>
3559 <td class="paramname">x</td><td>)</td>
3560 <td>   (x)</td>
3561 </tr>
3562 </table>
3563 </div><div class="memdoc">
3564
3565 </div>
3566 </div>
3567 <a id="AUDENV_VOL" name="AUDENV_VOL"></a>
3568 <h2 class="memtitle"><span class="permalink"><a href="#AUDENV_VOL">◆ </a></span>AUDENV_VOL</h2>
3569
3570 <div class="memitem">
3571 <div class="memproto">
3572 <table class="memname">
3573 <tr>
3574 <td class="memname">#define AUDENV_VOL</td>
3575 <td>(</td>
3576 <td class="paramtype"> </td>
3577 <td class="paramname">x</td><td>)</td>
3578 <td>   ((x) << 4)</td>
3579 </tr>
3580 </table>
3581 </div><div class="memdoc">
3582
3583 </div>
3584 </div>
3585 <a id="AUDENV_UP" name="AUDENV_UP"></a>
3586 <h2 class="memtitle"><span class="permalink"><a href="#AUDENV_UP">◆ </a></span>AUDENV_UP</h2>
3587
3588 <div class="memitem">
3589 <div class="memproto">
3590 <table class="memname">
3591 <tr>
3592 <td class="memname">#define AUDENV_UP   0b00001000</td>
3593 </tr>
3594 </table>
3595 </div><div class="memdoc">
3596
3597 </div>
3598 </div>
3599 <a id="AUDENV_DOWN" name="AUDENV_DOWN"></a>
3600 <h2 class="memtitle"><span class="permalink"><a href="#AUDENV_DOWN">◆ </a></span>AUDENV_DOWN</h2>
3601
3602 <div class="memitem">
3603 <div class="memproto">
3604 <table class="memname">
3605 <tr>
3606 <td class="memname">#define AUDENV_DOWN   0b00000000</td>
3607 </tr>
3608 </table>
3609 </div><div class="memdoc">
3610
3611 </div>
3612 </div>
3613 <a id="AUDENV_LENGTH" name="AUDENV_LENGTH"></a>
3614 <h2 class="memtitle"><span class="permalink"><a href="#AUDENV_LENGTH">◆ </a></span>AUDENV_LENGTH</h2>
3615
3616 <div class="memitem">
3617 <div class="memproto">
3618 <table class="memname">
3619 <tr>
3620 <td class="memname">#define AUDENV_LENGTH</td>
3621 <td>(</td>
3622 <td class="paramtype"> </td>
3623 <td class="paramname">x</td><td>)</td>
3624 <td>   (x)</td>
3625 </tr>
3626 </table>
3627 </div><div class="memdoc">
3628
3629 </div>
3630 </div>
3631 <a id="AUDHIGH_RESTART" name="AUDHIGH_RESTART"></a>
3632 <h2 class="memtitle"><span class="permalink"><a href="#AUDHIGH_RESTART">◆ </a></span>AUDHIGH_RESTART</h2>
3633
3634 <div class="memitem">
3635 <div class="memproto">
3636 <table class="memname">
3637 <tr>
3638 <td class="memname">#define AUDHIGH_RESTART   0b10000000</td>
3639 </tr>
3640 </table>
3641 </div><div class="memdoc">
3642
3643 </div>
3644 </div>
3645 <a id="AUDHIGH_LENGTH_ON" name="AUDHIGH_LENGTH_ON"></a>
3646 <h2 class="memtitle"><span class="permalink"><a href="#AUDHIGH_LENGTH_ON">◆ </a></span>AUDHIGH_LENGTH_ON</h2>
3647
3648 <div class="memitem">
3649 <div class="memproto">
3650 <table class="memname">
3651 <tr>
3652 <td class="memname">#define AUDHIGH_LENGTH_ON   0b01000000</td>
3653 </tr>
3654 </table>
3655 </div><div class="memdoc">
3656
3657 </div>
3658 </div>
3659 <a id="AUDHIGH_LENGTH_OFF" name="AUDHIGH_LENGTH_OFF"></a>
3660 <h2 class="memtitle"><span class="permalink"><a href="#AUDHIGH_LENGTH_OFF">◆ </a></span>AUDHIGH_LENGTH_OFF</h2>
3661
3662 <div class="memitem">
3663 <div class="memproto">
3664 <table class="memname">
3665 <tr>
3666 <td class="memname">#define AUDHIGH_LENGTH_OFF   0b00000000</td>
3667 </tr>
3668 </table>
3669 </div><div class="memdoc">
3670
3671 </div>
3672 </div>
3673 <a id="OAMF_PRI" name="OAMF_PRI"></a>
3674 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_PRI">◆ </a></span>OAMF_PRI</h2>
3675
3676 <div class="memitem">
3677 <div class="memproto">
3678 <table class="memname">
3679 <tr>
3680 <td class="memname">#define OAMF_PRI   0b10000000</td>
3681 </tr>
3682 </table>
3683 </div><div class="memdoc">
3684 <p >BG and Window over Sprite Enabled </p>
3685
3686 </div>
3687 </div>
3688 <a id="OAMF_YFLIP" name="OAMF_YFLIP"></a>
3689 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_YFLIP">◆ </a></span>OAMF_YFLIP</h2>
3690
3691 <div class="memitem">
3692 <div class="memproto">
3693 <table class="memname">
3694 <tr>
3695 <td class="memname">#define OAMF_YFLIP   0b01000000</td>
3696 </tr>
3697 </table>
3698 </div><div class="memdoc">
3699 <p >Sprite Y axis flip: Vertically mirrored </p>
3700
3701 </div>
3702 </div>
3703 <a id="OAMF_XFLIP" name="OAMF_XFLIP"></a>
3704 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_XFLIP">◆ </a></span>OAMF_XFLIP</h2>
3705
3706 <div class="memitem">
3707 <div class="memproto">
3708 <table class="memname">
3709 <tr>
3710 <td class="memname">#define OAMF_XFLIP   0b00100000</td>
3711 </tr>
3712 </table>
3713 </div><div class="memdoc">
3714 <p >Sprite X axis flip: Horizontally mirrored </p>
3715
3716 </div>
3717 </div>
3718 <a id="OAMF_PAL0" name="OAMF_PAL0"></a>
3719 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_PAL0">◆ </a></span>OAMF_PAL0</h2>
3720
3721 <div class="memitem">
3722 <div class="memproto">
3723 <table class="memname">
3724 <tr>
3725 <td class="memname">#define OAMF_PAL0   0b00000000</td>
3726 </tr>
3727 </table>
3728 </div><div class="memdoc">
3729 <p >Sprite Palette number: use OBP0 (Non-CGB Mode Only) </p>
3730
3731 </div>
3732 </div>
3733 <a id="OAMF_PAL1" name="OAMF_PAL1"></a>
3734 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_PAL1">◆ </a></span>OAMF_PAL1</h2>
3735
3736 <div class="memitem">
3737 <div class="memproto">
3738 <table class="memname">
3739 <tr>
3740 <td class="memname">#define OAMF_PAL1   0b00010000</td>
3741 </tr>
3742 </table>
3743 </div><div class="memdoc">
3744 <p >Sprite Palette number: use OBP1 (Non-CGB Mode Only) </p>
3745
3746 </div>
3747 </div>
3748 <a id="OAMF_BANK0" name="OAMF_BANK0"></a>
3749 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_BANK0">◆ </a></span>OAMF_BANK0</h2>
3750
3751 <div class="memitem">
3752 <div class="memproto">
3753 <table class="memname">
3754 <tr>
3755 <td class="memname">#define OAMF_BANK0   0b00000000</td>
3756 </tr>
3757 </table>
3758 </div><div class="memdoc">
3759 <p >Sprite Tile VRAM-Bank: Use Bank 0 (CGB Mode Only) </p>
3760
3761 </div>
3762 </div>
3763 <a id="OAMF_BANK1" name="OAMF_BANK1"></a>
3764 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_BANK1">◆ </a></span>OAMF_BANK1</h2>
3765
3766 <div class="memitem">
3767 <div class="memproto">
3768 <table class="memname">
3769 <tr>
3770 <td class="memname">#define OAMF_BANK1   0b00001000</td>
3771 </tr>
3772 </table>
3773 </div><div class="memdoc">
3774 <p >Sprite Tile VRAM-Bank: Use Bank 1 (CGB Mode Only) </p>
3775
3776 </div>
3777 </div>
3778 <a id="OAMF_CGB_PAL0" name="OAMF_CGB_PAL0"></a>
3779 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_CGB_PAL0">◆ </a></span>OAMF_CGB_PAL0</h2>
3780
3781 <div class="memitem">
3782 <div class="memproto">
3783 <table class="memname">
3784 <tr>
3785 <td class="memname">#define OAMF_CGB_PAL0   0b00000000</td>
3786 </tr>
3787 </table>
3788 </div><div class="memdoc">
3789 <p >Sprite CGB Palette number: use OCP0 (CGB Mode Only) </p>
3790
3791 </div>
3792 </div>
3793 <a id="OAMF_CGB_PAL1" name="OAMF_CGB_PAL1"></a>
3794 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_CGB_PAL1">◆ </a></span>OAMF_CGB_PAL1</h2>
3795
3796 <div class="memitem">
3797 <div class="memproto">
3798 <table class="memname">
3799 <tr>
3800 <td class="memname">#define OAMF_CGB_PAL1   0b00000001</td>
3801 </tr>
3802 </table>
3803 </div><div class="memdoc">
3804 <p >Sprite CGB Palette number: use OCP1 (CGB Mode Only) </p>
3805
3806 </div>
3807 </div>
3808 <a id="OAMF_CGB_PAL2" name="OAMF_CGB_PAL2"></a>
3809 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_CGB_PAL2">◆ </a></span>OAMF_CGB_PAL2</h2>
3810
3811 <div class="memitem">
3812 <div class="memproto">
3813 <table class="memname">
3814 <tr>
3815 <td class="memname">#define OAMF_CGB_PAL2   0b00000010</td>
3816 </tr>
3817 </table>
3818 </div><div class="memdoc">
3819 <p >Sprite CGB Palette number: use OCP2 (CGB Mode Only) </p>
3820
3821 </div>
3822 </div>
3823 <a id="OAMF_CGB_PAL3" name="OAMF_CGB_PAL3"></a>
3824 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_CGB_PAL3">◆ </a></span>OAMF_CGB_PAL3</h2>
3825
3826 <div class="memitem">
3827 <div class="memproto">
3828 <table class="memname">
3829 <tr>
3830 <td class="memname">#define OAMF_CGB_PAL3   0b00000011</td>
3831 </tr>
3832 </table>
3833 </div><div class="memdoc">
3834 <p >Sprite CGB Palette number: use OCP3 (CGB Mode Only) </p>
3835
3836 </div>
3837 </div>
3838 <a id="OAMF_CGB_PAL4" name="OAMF_CGB_PAL4"></a>
3839 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_CGB_PAL4">◆ </a></span>OAMF_CGB_PAL4</h2>
3840
3841 <div class="memitem">
3842 <div class="memproto">
3843 <table class="memname">
3844 <tr>
3845 <td class="memname">#define OAMF_CGB_PAL4   0b00000100</td>
3846 </tr>
3847 </table>
3848 </div><div class="memdoc">
3849 <p >Sprite CGB Palette number: use OCP4 (CGB Mode Only) </p>
3850
3851 </div>
3852 </div>
3853 <a id="OAMF_CGB_PAL5" name="OAMF_CGB_PAL5"></a>
3854 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_CGB_PAL5">◆ </a></span>OAMF_CGB_PAL5</h2>
3855
3856 <div class="memitem">
3857 <div class="memproto">
3858 <table class="memname">
3859 <tr>
3860 <td class="memname">#define OAMF_CGB_PAL5   0b00000101</td>
3861 </tr>
3862 </table>
3863 </div><div class="memdoc">
3864 <p >Sprite CGB Palette number: use OCP5 (CGB Mode Only) </p>
3865
3866 </div>
3867 </div>
3868 <a id="OAMF_CGB_PAL6" name="OAMF_CGB_PAL6"></a>
3869 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_CGB_PAL6">◆ </a></span>OAMF_CGB_PAL6</h2>
3870
3871 <div class="memitem">
3872 <div class="memproto">
3873 <table class="memname">
3874 <tr>
3875 <td class="memname">#define OAMF_CGB_PAL6   0b00000110</td>
3876 </tr>
3877 </table>
3878 </div><div class="memdoc">
3879 <p >Sprite CGB Palette number: use OCP6 (CGB Mode Only) </p>
3880
3881 </div>
3882 </div>
3883 <a id="OAMF_CGB_PAL7" name="OAMF_CGB_PAL7"></a>
3884 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_CGB_PAL7">◆ </a></span>OAMF_CGB_PAL7</h2>
3885
3886 <div class="memitem">
3887 <div class="memproto">
3888 <table class="memname">
3889 <tr>
3890 <td class="memname">#define OAMF_CGB_PAL7   0b00000111</td>
3891 </tr>
3892 </table>
3893 </div><div class="memdoc">
3894 <p >Sprite CGB Palette number: use OCP7 (CGB Mode Only) </p>
3895
3896 </div>
3897 </div>
3898 <a id="OAMF_PALMASK" name="OAMF_PALMASK"></a>
3899 <h2 class="memtitle"><span class="permalink"><a href="#OAMF_PALMASK">◆ </a></span>OAMF_PALMASK</h2>
3900
3901 <div class="memitem">
3902 <div class="memproto">
3903 <table class="memname">
3904 <tr>
3905 <td class="memname">#define OAMF_PALMASK   0b00000111</td>
3906 </tr>
3907 </table>
3908 </div><div class="memdoc">
3909 <p >Mask for Sprite CGB Palette number (CGB Mode Only) </p>
3910
3911 </div>
3912 </div>
3913 <a id="DEVICE_SCREEN_X_OFFSET" name="DEVICE_SCREEN_X_OFFSET"></a>
3914 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_SCREEN_X_OFFSET">◆ </a></span>DEVICE_SCREEN_X_OFFSET</h2>
3915
3916 <div class="memitem">
3917 <div class="memproto">
3918 <table class="memname">
3919 <tr>
3920 <td class="memname">#define DEVICE_SCREEN_X_OFFSET   0</td>
3921 </tr>
3922 </table>
3923 </div><div class="memdoc">
3924 <p >Offset of visible screen (in tile units) from left edge of hardware map </p>
3925
3926 </div>
3927 </div>
3928 <a id="DEVICE_SCREEN_Y_OFFSET" name="DEVICE_SCREEN_Y_OFFSET"></a>
3929 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_SCREEN_Y_OFFSET">◆ </a></span>DEVICE_SCREEN_Y_OFFSET</h2>
3930
3931 <div class="memitem">
3932 <div class="memproto">
3933 <table class="memname">
3934 <tr>
3935 <td class="memname">#define DEVICE_SCREEN_Y_OFFSET   0</td>
3936 </tr>
3937 </table>
3938 </div><div class="memdoc">
3939 <p >Offset of visible screen (in tile units) from top edge of hardware map </p>
3940
3941 </div>
3942 </div>
3943 <a id="DEVICE_SCREEN_WIDTH" name="DEVICE_SCREEN_WIDTH"></a>
3944 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_SCREEN_WIDTH">◆ </a></span>DEVICE_SCREEN_WIDTH</h2>
3945
3946 <div class="memitem">
3947 <div class="memproto">
3948 <table class="memname">
3949 <tr>
3950 <td class="memname">#define DEVICE_SCREEN_WIDTH   20</td>
3951 </tr>
3952 </table>
3953 </div><div class="memdoc">
3954 <p >Width of visible screen in tile units </p>
3955
3956 </div>
3957 </div>
3958 <a id="DEVICE_SCREEN_HEIGHT" name="DEVICE_SCREEN_HEIGHT"></a>
3959 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_SCREEN_HEIGHT">◆ </a></span>DEVICE_SCREEN_HEIGHT</h2>
3960
3961 <div class="memitem">
3962 <div class="memproto">
3963 <table class="memname">
3964 <tr>
3965 <td class="memname">#define DEVICE_SCREEN_HEIGHT   18</td>
3966 </tr>
3967 </table>
3968 </div><div class="memdoc">
3969 <p >Height of visible screen in tile units </p>
3970
3971 </div>
3972 </div>
3973 <a id="DEVICE_SCREEN_BUFFER_WIDTH" name="DEVICE_SCREEN_BUFFER_WIDTH"></a>
3974 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_SCREEN_BUFFER_WIDTH">◆ </a></span>DEVICE_SCREEN_BUFFER_WIDTH</h2>
3975
3976 <div class="memitem">
3977 <div class="memproto">
3978 <table class="memname">
3979 <tr>
3980 <td class="memname">#define DEVICE_SCREEN_BUFFER_WIDTH   32</td>
3981 </tr>
3982 </table>
3983 </div><div class="memdoc">
3984 <p >Width of hardware map buffer in tile units </p>
3985
3986 </div>
3987 </div>
3988 <a id="DEVICE_SCREEN_BUFFER_HEIGHT" name="DEVICE_SCREEN_BUFFER_HEIGHT"></a>
3989 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_SCREEN_BUFFER_HEIGHT">◆ </a></span>DEVICE_SCREEN_BUFFER_HEIGHT</h2>
3990
3991 <div class="memitem">
3992 <div class="memproto">
3993 <table class="memname">
3994 <tr>
3995 <td class="memname">#define DEVICE_SCREEN_BUFFER_HEIGHT   32</td>
3996 </tr>
3997 </table>
3998 </div><div class="memdoc">
3999 <p >Height of hardware map buffer in tile units </p>
4000
4001 </div>
4002 </div>
4003 <a id="DEVICE_SCREEN_MAP_ENTRY_SIZE" name="DEVICE_SCREEN_MAP_ENTRY_SIZE"></a>
4004 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_SCREEN_MAP_ENTRY_SIZE">◆ </a></span>DEVICE_SCREEN_MAP_ENTRY_SIZE</h2>
4005
4006 <div class="memitem">
4007 <div class="memproto">
4008 <table class="memname">
4009 <tr>
4010 <td class="memname">#define DEVICE_SCREEN_MAP_ENTRY_SIZE   1</td>
4011 </tr>
4012 </table>
4013 </div><div class="memdoc">
4014 <p >Number of bytes per hardware map entry </p>
4015
4016 </div>
4017 </div>
4018 <a id="DEVICE_SPRITE_PX_OFFSET_X" name="DEVICE_SPRITE_PX_OFFSET_X"></a>
4019 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_SPRITE_PX_OFFSET_X">◆ </a></span>DEVICE_SPRITE_PX_OFFSET_X</h2>
4020
4021 <div class="memitem">
4022 <div class="memproto">
4023 <table class="memname">
4024 <tr>
4025 <td class="memname">#define DEVICE_SPRITE_PX_OFFSET_X   8</td>
4026 </tr>
4027 </table>
4028 </div><div class="memdoc">
4029 <p >Offset of sprite X coordinate origin (in pixels) from left edge of visible screen </p>
4030
4031 </div>
4032 </div>
4033 <a id="DEVICE_SPRITE_PX_OFFSET_Y" name="DEVICE_SPRITE_PX_OFFSET_Y"></a>
4034 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_SPRITE_PX_OFFSET_Y">◆ </a></span>DEVICE_SPRITE_PX_OFFSET_Y</h2>
4035
4036 <div class="memitem">
4037 <div class="memproto">
4038 <table class="memname">
4039 <tr>
4040 <td class="memname">#define DEVICE_SPRITE_PX_OFFSET_Y   16</td>
4041 </tr>
4042 </table>
4043 </div><div class="memdoc">
4044 <p >Offset of sprite Y coordinate origin (in pixels) from top edge of visible screen </p>
4045
4046 </div>
4047 </div>
4048 <a id="DEVICE_WINDOW_PX_OFFSET_X" name="DEVICE_WINDOW_PX_OFFSET_X"></a>
4049 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_WINDOW_PX_OFFSET_X">◆ </a></span>DEVICE_WINDOW_PX_OFFSET_X</h2>
4050
4051 <div class="memitem">
4052 <div class="memproto">
4053 <table class="memname">
4054 <tr>
4055 <td class="memname">#define DEVICE_WINDOW_PX_OFFSET_X   7</td>
4056 </tr>
4057 </table>
4058 </div><div class="memdoc">
4059 <p >Minimal X coordinate of the window layer </p>
4060
4061 </div>
4062 </div>
4063 <a id="DEVICE_WINDOW_PX_OFFSET_Y" name="DEVICE_WINDOW_PX_OFFSET_Y"></a>
4064 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_WINDOW_PX_OFFSET_Y">◆ </a></span>DEVICE_WINDOW_PX_OFFSET_Y</h2>
4065
4066 <div class="memitem">
4067 <div class="memproto">
4068 <table class="memname">
4069 <tr>
4070 <td class="memname">#define DEVICE_WINDOW_PX_OFFSET_Y   0</td>
4071 </tr>
4072 </table>
4073 </div><div class="memdoc">
4074 <p >Minimal Y coordinate of the window layer </p>
4075
4076 </div>
4077 </div>
4078 <a id="DEVICE_SCREEN_PX_WIDTH" name="DEVICE_SCREEN_PX_WIDTH"></a>
4079 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_SCREEN_PX_WIDTH">◆ </a></span>DEVICE_SCREEN_PX_WIDTH</h2>
4080
4081 <div class="memitem">
4082 <div class="memproto">
4083 <table class="memname">
4084 <tr>
4085 <td class="memname">#define DEVICE_SCREEN_PX_WIDTH   (<a class="el" href="nes_2hardware_8h.html#DEVICE_SCREEN_WIDTH">DEVICE_SCREEN_WIDTH</a> * 8)</td>
4086 </tr>
4087 </table>
4088 </div><div class="memdoc">
4089 <p >Width of visible screen in pixels </p>
4090
4091 </div>
4092 </div>
4093 <a id="DEVICE_SCREEN_PX_HEIGHT" name="DEVICE_SCREEN_PX_HEIGHT"></a>
4094 <h2 class="memtitle"><span class="permalink"><a href="#DEVICE_SCREEN_PX_HEIGHT">◆ </a></span>DEVICE_SCREEN_PX_HEIGHT</h2>
4095
4096 <div class="memitem">
4097 <div class="memproto">
4098 <table class="memname">
4099 <tr>
4100 <td class="memname">#define DEVICE_SCREEN_PX_HEIGHT   (<a class="el" href="nes_2hardware_8h.html#DEVICE_SCREEN_HEIGHT">DEVICE_SCREEN_HEIGHT</a> * 8)</td>
4101 </tr>
4102 </table>
4103 </div><div class="memdoc">
4104 <p >Height of visible screen in pixels </p>
4105
4106 </div>
4107 </div>
4108 <h2 class="groupheader">Variable Documentation</h2>
4109 <a id="_VRAM" name="_VRAM"></a>
4110 <h2 class="memtitle"><span class="permalink"><a href="#_VRAM">◆ </a></span>_VRAM</h2>
4111
4112 <div class="memitem">
4113 <div class="memproto">
4114 <table class="memname">
4115 <tr>
4116 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> _VRAM[]</td>
4117 </tr>
4118 </table>
4119 </div><div class="memdoc">
4120 <p >Memory map </p>
4121
4122 </div>
4123 </div>
4124 <a id="_VRAM8000" name="_VRAM8000"></a>
4125 <h2 class="memtitle"><span class="permalink"><a href="#_VRAM8000">◆ </a></span>_VRAM8000</h2>
4126
4127 <div class="memitem">
4128 <div class="memproto">
4129 <table class="memname">
4130 <tr>
4131 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> _VRAM8000[]</td>
4132 </tr>
4133 </table>
4134 </div><div class="memdoc">
4135
4136 </div>
4137 </div>
4138 <a id="_VRAM8800" name="_VRAM8800"></a>
4139 <h2 class="memtitle"><span class="permalink"><a href="#_VRAM8800">◆ </a></span>_VRAM8800</h2>
4140
4141 <div class="memitem">
4142 <div class="memproto">
4143 <table class="memname">
4144 <tr>
4145 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> _VRAM8800[]</td>
4146 </tr>
4147 </table>
4148 </div><div class="memdoc">
4149
4150 </div>
4151 </div>
4152 <a id="_VRAM9000" name="_VRAM9000"></a>
4153 <h2 class="memtitle"><span class="permalink"><a href="#_VRAM9000">◆ </a></span>_VRAM9000</h2>
4154
4155 <div class="memitem">
4156 <div class="memproto">
4157 <table class="memname">
4158 <tr>
4159 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> _VRAM9000[]</td>
4160 </tr>
4161 </table>
4162 </div><div class="memdoc">
4163
4164 </div>
4165 </div>
4166 <a id="_SCRN0" name="_SCRN0"></a>
4167 <h2 class="memtitle"><span class="permalink"><a href="#_SCRN0">◆ </a></span>_SCRN0</h2>
4168
4169 <div class="memitem">
4170 <div class="memproto">
4171 <table class="memname">
4172 <tr>
4173 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> _SCRN0[]</td>
4174 </tr>
4175 </table>
4176 </div><div class="memdoc">
4177
4178 </div>
4179 </div>
4180 <a id="_SCRN1" name="_SCRN1"></a>
4181 <h2 class="memtitle"><span class="permalink"><a href="#_SCRN1">◆ </a></span>_SCRN1</h2>
4182
4183 <div class="memitem">
4184 <div class="memproto">
4185 <table class="memname">
4186 <tr>
4187 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> _SCRN1[]</td>
4188 </tr>
4189 </table>
4190 </div><div class="memdoc">
4191
4192 </div>
4193 </div>
4194 <a id="_SRAM" name="_SRAM"></a>
4195 <h2 class="memtitle"><span class="permalink"><a href="#_SRAM">◆ </a></span>_SRAM</h2>
4196
4197 <div class="memitem">
4198 <div class="memproto">
4199 <table class="memname">
4200 <tr>
4201 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> _SRAM[]</td>
4202 </tr>
4203 </table>
4204 </div><div class="memdoc">
4205
4206 </div>
4207 </div>
4208 <a id="_RAM" name="_RAM"></a>
4209 <h2 class="memtitle"><span class="permalink"><a href="#_RAM">◆ </a></span>_RAM</h2>
4210
4211 <div class="memitem">
4212 <div class="memproto">
4213 <table class="memname">
4214 <tr>
4215 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> _RAM[]</td>
4216 </tr>
4217 </table>
4218 </div><div class="memdoc">
4219
4220 </div>
4221 </div>
4222 <a id="_RAMBANK" name="_RAMBANK"></a>
4223 <h2 class="memtitle"><span class="permalink"><a href="#_RAMBANK">◆ </a></span>_RAMBANK</h2>
4224
4225 <div class="memitem">
4226 <div class="memproto">
4227 <table class="memname">
4228 <tr>
4229 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> _RAMBANK[]</td>
4230 </tr>
4231 </table>
4232 </div><div class="memdoc">
4233
4234 </div>
4235 </div>
4236 <a id="_OAMRAM" name="_OAMRAM"></a>
4237 <h2 class="memtitle"><span class="permalink"><a href="#_OAMRAM">◆ </a></span>_OAMRAM</h2>
4238
4239 <div class="memitem">
4240 <div class="memproto">
4241 <table class="memname">
4242 <tr>
4243 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTES">__BYTES</a> _OAMRAM[]</td>
4244 </tr>
4245 </table>
4246 </div><div class="memdoc">
4247
4248 </div>
4249 </div>
4250 <a id="_IO" name="_IO"></a>
4251 <h2 class="memtitle"><span class="permalink"><a href="#_IO">◆ </a></span>_IO</h2>
4252
4253 <div class="memitem">
4254 <div class="memproto">
4255 <table class="memname">
4256 <tr>
4257 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> _IO[]</td>
4258 </tr>
4259 </table>
4260 </div><div class="memdoc">
4261
4262 </div>
4263 </div>
4264 <a id="_AUD3WAVERAM" name="_AUD3WAVERAM"></a>
4265 <h2 class="memtitle"><span class="permalink"><a href="#_AUD3WAVERAM">◆ </a></span>_AUD3WAVERAM</h2>
4266
4267 <div class="memitem">
4268 <div class="memproto">
4269 <table class="memname">
4270 <tr>
4271 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> _AUD3WAVERAM[]</td>
4272 </tr>
4273 </table>
4274 </div><div class="memdoc">
4275
4276 </div>
4277 </div>
4278 <a id="_HRAM" name="_HRAM"></a>
4279 <h2 class="memtitle"><span class="permalink"><a href="#_HRAM">◆ </a></span>_HRAM</h2>
4280
4281 <div class="memitem">
4282 <div class="memproto">
4283 <table class="memname">
4284 <tr>
4285 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> _HRAM[]</td>
4286 </tr>
4287 </table>
4288 </div><div class="memdoc">
4289
4290 </div>
4291 </div>
4292 <a id="rRAMG" name="rRAMG"></a>
4293 <h2 class="memtitle"><span class="permalink"><a href="#rRAMG">◆ </a></span>rRAMG</h2>
4294
4295 <div class="memitem">
4296 <div class="memproto">
4297 <table class="memname">
4298 <tr>
4299 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rRAMG</td>
4300 </tr>
4301 </table>
4302 </div><div class="memdoc">
4303 <p >MBC5 registers </p>
4304
4305 </div>
4306 </div>
4307 <a id="rROMB0" name="rROMB0"></a>
4308 <h2 class="memtitle"><span class="permalink"><a href="#rROMB0">◆ </a></span>rROMB0</h2>
4309
4310 <div class="memitem">
4311 <div class="memproto">
4312 <table class="memname">
4313 <tr>
4314 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rROMB0</td>
4315 </tr>
4316 </table>
4317 </div><div class="memdoc">
4318
4319 </div>
4320 </div>
4321 <a id="rROMB1" name="rROMB1"></a>
4322 <h2 class="memtitle"><span class="permalink"><a href="#rROMB1">◆ </a></span>rROMB1</h2>
4323
4324 <div class="memitem">
4325 <div class="memproto">
4326 <table class="memname">
4327 <tr>
4328 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rROMB1</td>
4329 </tr>
4330 </table>
4331 </div><div class="memdoc">
4332
4333 </div>
4334 </div>
4335 <a id="rRAMB" name="rRAMB"></a>
4336 <h2 class="memtitle"><span class="permalink"><a href="#rRAMB">◆ </a></span>rRAMB</h2>
4337
4338 <div class="memitem">
4339 <div class="memproto">
4340 <table class="memname">
4341 <tr>
4342 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rRAMB</td>
4343 </tr>
4344 </table>
4345 </div><div class="memdoc">
4346
4347 </div>
4348 </div>
4349 <a id="rMBC7_SRAM_ENABLE_1" name="rMBC7_SRAM_ENABLE_1"></a>
4350 <h2 class="memtitle"><span class="permalink"><a href="#rMBC7_SRAM_ENABLE_1">◆ </a></span>rMBC7_SRAM_ENABLE_1</h2>
4351
4352 <div class="memitem">
4353 <div class="memproto">
4354 <table class="memname">
4355 <tr>
4356 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rMBC7_SRAM_ENABLE_1</td>
4357 </tr>
4358 </table>
4359 </div><div class="memdoc">
4360 <p >MBC7 registers </p>
4361
4362 </div>
4363 </div>
4364 <a id="rMBC7_SRAM_ENABLE_2" name="rMBC7_SRAM_ENABLE_2"></a>
4365 <h2 class="memtitle"><span class="permalink"><a href="#rMBC7_SRAM_ENABLE_2">◆ </a></span>rMBC7_SRAM_ENABLE_2</h2>
4366
4367 <div class="memitem">
4368 <div class="memproto">
4369 <table class="memname">
4370 <tr>
4371 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rMBC7_SRAM_ENABLE_2</td>
4372 </tr>
4373 </table>
4374 </div><div class="memdoc">
4375
4376 </div>
4377 </div>
4378 <a id="rMBC7_LATCH_1" name="rMBC7_LATCH_1"></a>
4379 <h2 class="memtitle"><span class="permalink"><a href="#rMBC7_LATCH_1">◆ </a></span>rMBC7_LATCH_1</h2>
4380
4381 <div class="memitem">
4382 <div class="memproto">
4383 <table class="memname">
4384 <tr>
4385 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rMBC7_LATCH_1</td>
4386 </tr>
4387 </table>
4388 </div><div class="memdoc">
4389
4390 </div>
4391 </div>
4392 <a id="rMBC7_LATCH_2" name="rMBC7_LATCH_2"></a>
4393 <h2 class="memtitle"><span class="permalink"><a href="#rMBC7_LATCH_2">◆ </a></span>rMBC7_LATCH_2</h2>
4394
4395 <div class="memitem">
4396 <div class="memproto">
4397 <table class="memname">
4398 <tr>
4399 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rMBC7_LATCH_2</td>
4400 </tr>
4401 </table>
4402 </div><div class="memdoc">
4403
4404 </div>
4405 </div>
4406 <a id="rMBC7_ACCEL_X_LO" name="rMBC7_ACCEL_X_LO"></a>
4407 <h2 class="memtitle"><span class="permalink"><a href="#rMBC7_ACCEL_X_LO">◆ </a></span>rMBC7_ACCEL_X_LO</h2>
4408
4409 <div class="memitem">
4410 <div class="memproto">
4411 <table class="memname">
4412 <tr>
4413 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rMBC7_ACCEL_X_LO</td>
4414 </tr>
4415 </table>
4416 </div><div class="memdoc">
4417
4418 </div>
4419 </div>
4420 <a id="rMBC7_ACCEL_X_HI" name="rMBC7_ACCEL_X_HI"></a>
4421 <h2 class="memtitle"><span class="permalink"><a href="#rMBC7_ACCEL_X_HI">◆ </a></span>rMBC7_ACCEL_X_HI</h2>
4422
4423 <div class="memitem">
4424 <div class="memproto">
4425 <table class="memname">
4426 <tr>
4427 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rMBC7_ACCEL_X_HI</td>
4428 </tr>
4429 </table>
4430 </div><div class="memdoc">
4431
4432 </div>
4433 </div>
4434 <a id="rMBC7_ACCEL_Y_LO" name="rMBC7_ACCEL_Y_LO"></a>
4435 <h2 class="memtitle"><span class="permalink"><a href="#rMBC7_ACCEL_Y_LO">◆ </a></span>rMBC7_ACCEL_Y_LO</h2>
4436
4437 <div class="memitem">
4438 <div class="memproto">
4439 <table class="memname">
4440 <tr>
4441 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rMBC7_ACCEL_Y_LO</td>
4442 </tr>
4443 </table>
4444 </div><div class="memdoc">
4445
4446 </div>
4447 </div>
4448 <a id="rMBC7_ACCEL_Y_HI" name="rMBC7_ACCEL_Y_HI"></a>
4449 <h2 class="memtitle"><span class="permalink"><a href="#rMBC7_ACCEL_Y_HI">◆ </a></span>rMBC7_ACCEL_Y_HI</h2>
4450
4451 <div class="memitem">
4452 <div class="memproto">
4453 <table class="memname">
4454 <tr>
4455 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> rMBC7_ACCEL_Y_HI</td>
4456 </tr>
4457 </table>
4458 </div><div class="memdoc">
4459
4460 </div>
4461 </div>
4462 <a id="P1_REG" name="P1_REG"></a>
4463 <h2 class="memtitle"><span class="permalink"><a href="#P1_REG">◆ </a></span>P1_REG</h2>
4464
4465 <div class="memitem">
4466 <div class="memproto">
4467 <table class="memname">
4468 <tr>
4469 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> P1_REG</td>
4470 </tr>
4471 </table>
4472 </div><div class="memdoc">
4473 <p >IO Registers Joystick register </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="gb_8h.html#joypad">joypad()</a>, <a class="el" href="gb_8h.html#add_JOY">add_JOY()</a>, <a class="el" href="gb_2hardware_8h.html#IEF_HILO">IEF_HILO</a>, <a class="el" href="gb_2hardware_8h.html#P1F_5">P1F_5</a>, <a class="el" href="gb_2hardware_8h.html#P1F_4">P1F_4</a>, <a class="el" href="gb_2hardware_8h.html#P1F_3">P1F_3</a>, <a class="el" href="gb_2hardware_8h.html#P1F_2">P1F_2</a>, <a class="el" href="gb_2hardware_8h.html#P1F_1">P1F_1</a>, <a class="el" href="gb_2hardware_8h.html#P1F_0">P1F_0</a>, <a class="el" href="gb_2hardware_8h.html#P1F_GET_DPAD">P1F_GET_DPAD</a>, <a class="el" href="gb_2hardware_8h.html#P1F_GET_BTN">P1F_GET_BTN</a>, <a class="el" href="gb_2hardware_8h.html#P1F_GET_NONE">P1F_GET_NONE</a> </dd></dl>
4474
4475 </div>
4476 </div>
4477 <a id="SB_REG" name="SB_REG"></a>
4478 <h2 class="memtitle"><span class="permalink"><a href="#SB_REG">◆ </a></span>SB_REG</h2>
4479
4480 <div class="memitem">
4481 <div class="memproto">
4482 <table class="memname">
4483 <tr>
4484 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> SB_REG</td>
4485 </tr>
4486 </table>
4487 </div><div class="memdoc">
4488 <p >Serial IO data buffer </p>
4489
4490 </div>
4491 </div>
4492 <a id="SC_REG" name="SC_REG"></a>
4493 <h2 class="memtitle"><span class="permalink"><a href="#SC_REG">◆ </a></span>SC_REG</h2>
4494
4495 <div class="memitem">
4496 <div class="memproto">
4497 <table class="memname">
4498 <tr>
4499 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> SC_REG</td>
4500 </tr>
4501 </table>
4502 </div><div class="memdoc">
4503 <p >Serial IO control register </p>
4504
4505 </div>
4506 </div>
4507 <a id="DIV_REG" name="DIV_REG"></a>
4508 <h2 class="memtitle"><span class="permalink"><a href="#DIV_REG">◆ </a></span>DIV_REG</h2>
4509
4510 <div class="memitem">
4511 <div class="memproto">
4512 <table class="memname">
4513 <tr>
4514 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> DIV_REG</td>
4515 </tr>
4516 </table>
4517 </div><div class="memdoc">
4518 <p >Divider register </p>
4519
4520 </div>
4521 </div>
4522 <a id="TIMA_REG" name="TIMA_REG"></a>
4523 <h2 class="memtitle"><span class="permalink"><a href="#TIMA_REG">◆ </a></span>TIMA_REG</h2>
4524
4525 <div class="memitem">
4526 <div class="memproto">
4527 <table class="memname">
4528 <tr>
4529 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> TIMA_REG</td>
4530 </tr>
4531 </table>
4532 </div><div class="memdoc">
4533 <p >Timer counter </p>
4534
4535 </div>
4536 </div>
4537 <a id="TMA_REG" name="TMA_REG"></a>
4538 <h2 class="memtitle"><span class="permalink"><a href="#TMA_REG">◆ </a></span>TMA_REG</h2>
4539
4540 <div class="memitem">
4541 <div class="memproto">
4542 <table class="memname">
4543 <tr>
4544 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> TMA_REG</td>
4545 </tr>
4546 </table>
4547 </div><div class="memdoc">
4548 <p >Timer modulo </p>
4549
4550 </div>
4551 </div>
4552 <a id="TAC_REG" name="TAC_REG"></a>
4553 <h2 class="memtitle"><span class="permalink"><a href="#TAC_REG">◆ </a></span>TAC_REG</h2>
4554
4555 <div class="memitem">
4556 <div class="memproto">
4557 <table class="memname">
4558 <tr>
4559 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> TAC_REG</td>
4560 </tr>
4561 </table>
4562 </div><div class="memdoc">
4563 <p >Timer control </p>
4564
4565 </div>
4566 </div>
4567 <a id="IF_REG" name="IF_REG"></a>
4568 <h2 class="memtitle"><span class="permalink"><a href="#IF_REG">◆ </a></span>IF_REG</h2>
4569
4570 <div class="memitem">
4571 <div class="memproto">
4572 <table class="memname">
4573 <tr>
4574 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> IF_REG</td>
4575 </tr>
4576 </table>
4577 </div><div class="memdoc">
4578 <p >Interrupt flags: <a class="el" href="gb_2hardware_8h.html#IEF_HILO">IEF_HILO</a>, <a class="el" href="gb_2hardware_8h.html#IEF_SERIAL">IEF_SERIAL</a>, <a class="el" href="gb_2hardware_8h.html#IEF_TIMER">IEF_TIMER</a>, <a class="el" href="gb_2hardware_8h.html#IEF_STAT">IEF_STAT</a>, <a class="el" href="gb_2hardware_8h.html#IEF_VBLANK">IEF_VBLANK</a> </p>
4579
4580 </div>
4581 </div>
4582 <a id="NR10_REG" name="NR10_REG"></a>
4583 <h2 class="memtitle"><span class="permalink"><a href="#NR10_REG">◆ </a></span>NR10_REG</h2>
4584
4585 <div class="memitem">
4586 <div class="memproto">
4587 <table class="memname">
4588 <tr>
4589 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR10_REG</td>
4590 </tr>
4591 </table>
4592 </div><div class="memdoc">
4593 <p >Sound Channel 1, NR10: Sweep </p>
4594
4595 </div>
4596 </div>
4597 <a id="NR11_REG" name="NR11_REG"></a>
4598 <h2 class="memtitle"><span class="permalink"><a href="#NR11_REG">◆ </a></span>NR11_REG</h2>
4599
4600 <div class="memitem">
4601 <div class="memproto">
4602 <table class="memname">
4603 <tr>
4604 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR11_REG</td>
4605 </tr>
4606 </table>
4607 </div><div class="memdoc">
4608 <p >Sound Channel 1, NR11: Sound length/Wave pattern duty </p>
4609
4610 </div>
4611 </div>
4612 <a id="NR12_REG" name="NR12_REG"></a>
4613 <h2 class="memtitle"><span class="permalink"><a href="#NR12_REG">◆ </a></span>NR12_REG</h2>
4614
4615 <div class="memitem">
4616 <div class="memproto">
4617 <table class="memname">
4618 <tr>
4619 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR12_REG</td>
4620 </tr>
4621 </table>
4622 </div><div class="memdoc">
4623 <p >Sound Channel 1, NR12: Volume Envelope </p>
4624
4625 </div>
4626 </div>
4627 <a id="NR13_REG" name="NR13_REG"></a>
4628 <h2 class="memtitle"><span class="permalink"><a href="#NR13_REG">◆ </a></span>NR13_REG</h2>
4629
4630 <div class="memitem">
4631 <div class="memproto">
4632 <table class="memname">
4633 <tr>
4634 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR13_REG</td>
4635 </tr>
4636 </table>
4637 </div><div class="memdoc">
4638 <p >Sound Channel 1, NR13: Frequency Low </p>
4639
4640 </div>
4641 </div>
4642 <a id="NR14_REG" name="NR14_REG"></a>
4643 <h2 class="memtitle"><span class="permalink"><a href="#NR14_REG">◆ </a></span>NR14_REG</h2>
4644
4645 <div class="memitem">
4646 <div class="memproto">
4647 <table class="memname">
4648 <tr>
4649 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR14_REG</td>
4650 </tr>
4651 </table>
4652 </div><div class="memdoc">
4653 <p >Sound Channel 1, NR14: Frequency High </p>
4654
4655 </div>
4656 </div>
4657 <a id="NR21_REG" name="NR21_REG"></a>
4658 <h2 class="memtitle"><span class="permalink"><a href="#NR21_REG">◆ </a></span>NR21_REG</h2>
4659
4660 <div class="memitem">
4661 <div class="memproto">
4662 <table class="memname">
4663 <tr>
4664 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR21_REG</td>
4665 </tr>
4666 </table>
4667 </div><div class="memdoc">
4668 <p >Sound Channel 2, NR21_REG: Tone </p>
4669
4670 </div>
4671 </div>
4672 <a id="NR22_REG" name="NR22_REG"></a>
4673 <h2 class="memtitle"><span class="permalink"><a href="#NR22_REG">◆ </a></span>NR22_REG</h2>
4674
4675 <div class="memitem">
4676 <div class="memproto">
4677 <table class="memname">
4678 <tr>
4679 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR22_REG</td>
4680 </tr>
4681 </table>
4682 </div><div class="memdoc">
4683 <p >Sound Channel 2, NR22_REG: Volume Envelope </p>
4684
4685 </div>
4686 </div>
4687 <a id="NR23_REG" name="NR23_REG"></a>
4688 <h2 class="memtitle"><span class="permalink"><a href="#NR23_REG">◆ </a></span>NR23_REG</h2>
4689
4690 <div class="memitem">
4691 <div class="memproto">
4692 <table class="memname">
4693 <tr>
4694 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR23_REG</td>
4695 </tr>
4696 </table>
4697 </div><div class="memdoc">
4698 <p >Sound Channel 2, NR23_REG: Frequency data Low </p>
4699
4700 </div>
4701 </div>
4702 <a id="NR24_REG" name="NR24_REG"></a>
4703 <h2 class="memtitle"><span class="permalink"><a href="#NR24_REG">◆ </a></span>NR24_REG</h2>
4704
4705 <div class="memitem">
4706 <div class="memproto">
4707 <table class="memname">
4708 <tr>
4709 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR24_REG</td>
4710 </tr>
4711 </table>
4712 </div><div class="memdoc">
4713 <p >Sound Channel 2, NR24_REG: Frequency data High </p>
4714
4715 </div>
4716 </div>
4717 <a id="NR30_REG" name="NR30_REG"></a>
4718 <h2 class="memtitle"><span class="permalink"><a href="#NR30_REG">◆ </a></span>NR30_REG</h2>
4719
4720 <div class="memitem">
4721 <div class="memproto">
4722 <table class="memname">
4723 <tr>
4724 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR30_REG</td>
4725 </tr>
4726 </table>
4727 </div><div class="memdoc">
4728 <p >Sound Channel 3, NR30_REG: Sound on/off </p>
4729
4730 </div>
4731 </div>
4732 <a id="NR31_REG" name="NR31_REG"></a>
4733 <h2 class="memtitle"><span class="permalink"><a href="#NR31_REG">◆ </a></span>NR31_REG</h2>
4734
4735 <div class="memitem">
4736 <div class="memproto">
4737 <table class="memname">
4738 <tr>
4739 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR31_REG</td>
4740 </tr>
4741 </table>
4742 </div><div class="memdoc">
4743 <p >Sound Channel 3, NR31_REG: Sound Length </p>
4744
4745 </div>
4746 </div>
4747 <a id="NR32_REG" name="NR32_REG"></a>
4748 <h2 class="memtitle"><span class="permalink"><a href="#NR32_REG">◆ </a></span>NR32_REG</h2>
4749
4750 <div class="memitem">
4751 <div class="memproto">
4752 <table class="memname">
4753 <tr>
4754 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR32_REG</td>
4755 </tr>
4756 </table>
4757 </div><div class="memdoc">
4758 <p >Sound Channel 3, NR32_REG: Select output level </p>
4759
4760 </div>
4761 </div>
4762 <a id="NR33_REG" name="NR33_REG"></a>
4763 <h2 class="memtitle"><span class="permalink"><a href="#NR33_REG">◆ </a></span>NR33_REG</h2>
4764
4765 <div class="memitem">
4766 <div class="memproto">
4767 <table class="memname">
4768 <tr>
4769 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR33_REG</td>
4770 </tr>
4771 </table>
4772 </div><div class="memdoc">
4773 <p >Sound Channel 3, NR33_REG: Frequency data Low </p>
4774
4775 </div>
4776 </div>
4777 <a id="NR34_REG" name="NR34_REG"></a>
4778 <h2 class="memtitle"><span class="permalink"><a href="#NR34_REG">◆ </a></span>NR34_REG</h2>
4779
4780 <div class="memitem">
4781 <div class="memproto">
4782 <table class="memname">
4783 <tr>
4784 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR34_REG</td>
4785 </tr>
4786 </table>
4787 </div><div class="memdoc">
4788 <p >Sound Channel 3, NR34_REG: Frequency data High </p>
4789
4790 </div>
4791 </div>
4792 <a id="NR41_REG" name="NR41_REG"></a>
4793 <h2 class="memtitle"><span class="permalink"><a href="#NR41_REG">◆ </a></span>NR41_REG</h2>
4794
4795 <div class="memitem">
4796 <div class="memproto">
4797 <table class="memname">
4798 <tr>
4799 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR41_REG</td>
4800 </tr>
4801 </table>
4802 </div><div class="memdoc">
4803 <p >Sound Channel 4, NR41_REG: Sound Length </p>
4804
4805 </div>
4806 </div>
4807 <a id="NR42_REG" name="NR42_REG"></a>
4808 <h2 class="memtitle"><span class="permalink"><a href="#NR42_REG">◆ </a></span>NR42_REG</h2>
4809
4810 <div class="memitem">
4811 <div class="memproto">
4812 <table class="memname">
4813 <tr>
4814 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR42_REG</td>
4815 </tr>
4816 </table>
4817 </div><div class="memdoc">
4818 <p >Sound Channel 4, NR42_REG: Volume Envelope </p>
4819
4820 </div>
4821 </div>
4822 <a id="NR43_REG" name="NR43_REG"></a>
4823 <h2 class="memtitle"><span class="permalink"><a href="#NR43_REG">◆ </a></span>NR43_REG</h2>
4824
4825 <div class="memitem">
4826 <div class="memproto">
4827 <table class="memname">
4828 <tr>
4829 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR43_REG</td>
4830 </tr>
4831 </table>
4832 </div><div class="memdoc">
4833 <p >Sound Channel 4, NR43_REG: Polynomial Counter </p>
4834
4835 </div>
4836 </div>
4837 <a id="NR44_REG" name="NR44_REG"></a>
4838 <h2 class="memtitle"><span class="permalink"><a href="#NR44_REG">◆ </a></span>NR44_REG</h2>
4839
4840 <div class="memitem">
4841 <div class="memproto">
4842 <table class="memname">
4843 <tr>
4844 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR44_REG</td>
4845 </tr>
4846 </table>
4847 </div><div class="memdoc">
4848 <p >Sound Channel 4, NR44_REG: Counter / Consecutive and Initial <br />
4849 </p>
4850
4851 </div>
4852 </div>
4853 <a id="NR50_REG" name="NR50_REG"></a>
4854 <h2 class="memtitle"><span class="permalink"><a href="#NR50_REG">◆ </a></span>NR50_REG</h2>
4855
4856 <div class="memitem">
4857 <div class="memproto">
4858 <table class="memname">
4859 <tr>
4860 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR50_REG</td>
4861 </tr>
4862 </table>
4863 </div><div class="memdoc">
4864 <p >Sound Master Volume, NR50: Volume and Cart external sound input (VIN) </p>
4865
4866 </div>
4867 </div>
4868 <a id="NR51_REG" name="NR51_REG"></a>
4869 <h2 class="memtitle"><span class="permalink"><a href="#NR51_REG">◆ </a></span>NR51_REG</h2>
4870
4871 <div class="memitem">
4872 <div class="memproto">
4873 <table class="memname">
4874 <tr>
4875 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR51_REG</td>
4876 </tr>
4877 </table>
4878 </div><div class="memdoc">
4879 <p >Sound Panning, NR51: Enable/disable left and right output for sound channels </p>
4880
4881 </div>
4882 </div>
4883 <a id="NR52_REG" name="NR52_REG"></a>
4884 <h2 class="memtitle"><span class="permalink"><a href="#NR52_REG">◆ </a></span>NR52_REG</h2>
4885
4886 <div class="memitem">
4887 <div class="memproto">
4888 <table class="memname">
4889 <tr>
4890 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> NR52_REG</td>
4891 </tr>
4892 </table>
4893 </div><div class="memdoc">
4894 <p >Sound Master Control, NR52: ON / OFF </p>
4895
4896 </div>
4897 </div>
4898 <a id="AUD3WAVE" name="AUD3WAVE"></a>
4899 <h2 class="memtitle"><span class="permalink"><a href="#AUD3WAVE">◆ </a></span>AUD3WAVE</h2>
4900
4901 <div class="memitem">
4902 <div class="memproto">
4903 <table class="memname">
4904 <tr>
4905 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> AUD3WAVE[16]</td>
4906 </tr>
4907 </table>
4908 </div><div class="memdoc">
4909
4910 </div>
4911 </div>
4912 <a id="PCM_SAMPLE" name="PCM_SAMPLE"></a>
4913 <h2 class="memtitle"><span class="permalink"><a href="#PCM_SAMPLE">◆ </a></span>PCM_SAMPLE</h2>
4914
4915 <div class="memitem">
4916 <div class="memproto">
4917 <table class="memname">
4918 <tr>
4919 <td class="memname"><a class="el" href="sms_2hardware_8h.html#__BYTE_REG">__BYTE_REG</a> PCM_SAMPLE[16]</td>
4920 </tr>
4921 </table>
4922 </div><div class="memdoc">
4923
4924 </div>
4925 </div>
4926 <a id="LCDC_REG" name="LCDC_REG"></a>
4927 <h2 class="memtitle"><span class="permalink"><a href="#LCDC_REG">◆ </a></span>LCDC_REG</h2>
4928
4929 <div class="memitem">
4930 <div class="memproto">
4931 <table class="memname">
4932 <tr>
4933 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> LCDC_REG</td>
4934 </tr>
4935 </table>
4936 </div><div class="memdoc">
4937 <p >LCD control </p>
4938
4939 </div>
4940 </div>
4941 <a id="STAT_REG" name="STAT_REG"></a>
4942 <h2 class="memtitle"><span class="permalink"><a href="#STAT_REG">◆ </a></span>STAT_REG</h2>
4943
4944 <div class="memitem">
4945 <div class="memproto">
4946 <table class="memname">
4947 <tr>
4948 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> STAT_REG</td>
4949 </tr>
4950 </table>
4951 </div><div class="memdoc">
4952 <p >LCD status </p>
4953
4954 </div>
4955 </div>
4956 <a id="SCY_REG" name="SCY_REG"></a>
4957 <h2 class="memtitle"><span class="permalink"><a href="#SCY_REG">◆ </a></span>SCY_REG</h2>
4958
4959 <div class="memitem">
4960 <div class="memproto">
4961 <table class="memname">
4962 <tr>
4963 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> SCY_REG</td>
4964 </tr>
4965 </table>
4966 </div><div class="memdoc">
4967 <p >Scroll Y </p>
4968
4969 </div>
4970 </div>
4971 <a id="SCX_REG" name="SCX_REG"></a>
4972 <h2 class="memtitle"><span class="permalink"><a href="#SCX_REG">◆ </a></span>SCX_REG</h2>
4973
4974 <div class="memitem">
4975 <div class="memproto">
4976 <table class="memname">
4977 <tr>
4978 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> SCX_REG</td>
4979 </tr>
4980 </table>
4981 </div><div class="memdoc">
4982 <p >Scroll X </p>
4983
4984 </div>
4985 </div>
4986 <a id="LY_REG" name="LY_REG"></a>
4987 <h2 class="memtitle"><span class="permalink"><a href="#LY_REG">◆ </a></span>LY_REG</h2>
4988
4989 <div class="memitem">
4990 <div class="memproto">
4991 <table class="memname">
4992 <tr>
4993 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> LY_REG</td>
4994 </tr>
4995 </table>
4996 </div><div class="memdoc">
4997 <p >LCDC Y-coordinate </p>
4998
4999 </div>
5000 </div>
5001 <a id="LYC_REG" name="LYC_REG"></a>
5002 <h2 class="memtitle"><span class="permalink"><a href="#LYC_REG">◆ </a></span>LYC_REG</h2>
5003
5004 <div class="memitem">
5005 <div class="memproto">
5006 <table class="memname">
5007 <tr>
5008 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> LYC_REG</td>
5009 </tr>
5010 </table>
5011 </div><div class="memdoc">
5012 <p >LY compare </p>
5013
5014 </div>
5015 </div>
5016 <a id="DMA_REG" name="DMA_REG"></a>
5017 <h2 class="memtitle"><span class="permalink"><a href="#DMA_REG">◆ </a></span>DMA_REG</h2>
5018
5019 <div class="memitem">
5020 <div class="memproto">
5021 <table class="memname">
5022 <tr>
5023 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> DMA_REG</td>
5024 </tr>
5025 </table>
5026 </div><div class="memdoc">
5027 <p >DMA transfer </p>
5028
5029 </div>
5030 </div>
5031 <a id="BGP_REG" name="BGP_REG"></a>
5032 <h2 class="memtitle"><span class="permalink"><a href="#BGP_REG">◆ </a></span>BGP_REG</h2>
5033
5034 <div class="memitem">
5035 <div class="memproto">
5036 <table class="memname">
5037 <tr>
5038 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> BGP_REG</td>
5039 </tr>
5040 </table>
5041 </div><div class="memdoc">
5042 <p >Set and Read the Background palette. <br />
5043 <br />
5044 Example with the <a class="el" href="gb_8h.html#DMG_PALETTE">DMG_PALETTE()</a> helper function and constants: <br />
5045 BGP_REG = <a class="el" href="nes_8h.html#DMG_PALETTE">DMG_PALETTE(DMG_BLACK, DMG_DARK_GRAY, DMG_LITE_GRAY, DMG_WHITE)</a>; </p>
5046
5047 </div>
5048 </div>
5049 <a id="OBP0_REG" name="OBP0_REG"></a>
5050 <h2 class="memtitle"><span class="permalink"><a href="#OBP0_REG">◆ </a></span>OBP0_REG</h2>
5051
5052 <div class="memitem">
5053 <div class="memproto">
5054 <table class="memname">
5055 <tr>
5056 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> OBP0_REG</td>
5057 </tr>
5058 </table>
5059 </div><div class="memdoc">
5060 <p >Set and Read the OBJ (Sprite) palette 0. <br />
5061 <br />
5062 The first color entry is always transparent. <br />
5063 <br />
5064 Example with the <a class="el" href="gb_8h.html#DMG_PALETTE">DMG_PALETTE()</a> helper function and constants: <br />
5065 OBP0_REG = <a class="el" href="nes_8h.html#DMG_PALETTE">DMG_PALETTE(DMG_BLACK, DMG_DARK_GRAY, DMG_LITE_GRAY, DMG_WHITE)</a>; </p>
5066
5067 </div>
5068 </div>
5069 <a id="OBP1_REG" name="OBP1_REG"></a>
5070 <h2 class="memtitle"><span class="permalink"><a href="#OBP1_REG">◆ </a></span>OBP1_REG</h2>
5071
5072 <div class="memitem">
5073 <div class="memproto">
5074 <table class="memname">
5075 <tr>
5076 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> OBP1_REG</td>
5077 </tr>
5078 </table>
5079 </div><div class="memdoc">
5080 <p >Set and Read the OBJ (Sprite) palette 1. <br />
5081 <br />
5082 The first color entry is always transparent. <br />
5083 <br />
5084 Example with the <a class="el" href="gb_8h.html#DMG_PALETTE">DMG_PALETTE()</a> helper function and constants: <br />
5085 OBP1_REG = <a class="el" href="nes_8h.html#DMG_PALETTE">DMG_PALETTE(DMG_BLACK, DMG_DARK_GRAY, DMG_LITE_GRAY, DMG_WHITE)</a>; </p>
5086
5087 </div>
5088 </div>
5089 <a id="WY_REG" name="WY_REG"></a>
5090 <h2 class="memtitle"><span class="permalink"><a href="#WY_REG">◆ </a></span>WY_REG</h2>
5091
5092 <div class="memitem">
5093 <div class="memproto">
5094 <table class="memname">
5095 <tr>
5096 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> WY_REG</td>
5097 </tr>
5098 </table>
5099 </div><div class="memdoc">
5100 <p >Window Y coordinate </p>
5101
5102 </div>
5103 </div>
5104 <a id="WX_REG" name="WX_REG"></a>
5105 <h2 class="memtitle"><span class="permalink"><a href="#WX_REG">◆ </a></span>WX_REG</h2>
5106
5107 <div class="memitem">
5108 <div class="memproto">
5109 <table class="memname">
5110 <tr>
5111 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> WX_REG</td>
5112 </tr>
5113 </table>
5114 </div><div class="memdoc">
5115 <p >Window X coordinate </p>
5116
5117 </div>
5118 </div>
5119 <a id="KEY1_REG" name="KEY1_REG"></a>
5120 <h2 class="memtitle"><span class="permalink"><a href="#KEY1_REG">◆ </a></span>KEY1_REG</h2>
5121
5122 <div class="memitem">
5123 <div class="memproto">
5124 <table class="memname">
5125 <tr>
5126 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> KEY1_REG</td>
5127 </tr>
5128 </table>
5129 </div><div class="memdoc">
5130 <p >CPU speed </p>
5131
5132 </div>
5133 </div>
5134 <a id="VBK_REG" name="VBK_REG"></a>
5135 <h2 class="memtitle"><span class="permalink"><a href="#VBK_REG">◆ </a></span>VBK_REG</h2>
5136
5137 <div class="memitem">
5138 <div class="memproto">
5139 <table class="memname">
5140 <tr>
5141 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> VBK_REG</td>
5142 </tr>
5143 </table>
5144 </div><div class="memdoc">
5145 <p >VRAM bank select (CGB only) </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="gb_2hardware_8h.html#VBK_BANK_0">VBK_BANK_0</a>, <a class="el" href="gb_2hardware_8h.html#VBK_TILES">VBK_TILES</a>, <a class="el" href="gb_2hardware_8h.html#VBK_BANK_1">VBK_BANK_1</a>, <a class="el" href="gb_2hardware_8h.html#VBK_ATTRIBUTES">VBK_ATTRIBUTES</a> </dd></dl>
5146
5147 </div>
5148 </div>
5149 <a id="HDMA1_REG" name="HDMA1_REG"></a>
5150 <h2 class="memtitle"><span class="permalink"><a href="#HDMA1_REG">◆ </a></span>HDMA1_REG</h2>
5151
5152 <div class="memitem">
5153 <div class="memproto">
5154 <table class="memname">
5155 <tr>
5156 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> HDMA1_REG</td>
5157 </tr>
5158 </table>
5159 </div><div class="memdoc">
5160 <p >DMA control 1 </p>
5161
5162 </div>
5163 </div>
5164 <a id="HDMA2_REG" name="HDMA2_REG"></a>
5165 <h2 class="memtitle"><span class="permalink"><a href="#HDMA2_REG">◆ </a></span>HDMA2_REG</h2>
5166
5167 <div class="memitem">
5168 <div class="memproto">
5169 <table class="memname">
5170 <tr>
5171 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> HDMA2_REG</td>
5172 </tr>
5173 </table>
5174 </div><div class="memdoc">
5175 <p >DMA control 2 </p>
5176
5177 </div>
5178 </div>
5179 <a id="HDMA3_REG" name="HDMA3_REG"></a>
5180 <h2 class="memtitle"><span class="permalink"><a href="#HDMA3_REG">◆ </a></span>HDMA3_REG</h2>
5181
5182 <div class="memitem">
5183 <div class="memproto">
5184 <table class="memname">
5185 <tr>
5186 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> HDMA3_REG</td>
5187 </tr>
5188 </table>
5189 </div><div class="memdoc">
5190 <p >DMA control 3 </p>
5191
5192 </div>
5193 </div>
5194 <a id="HDMA4_REG" name="HDMA4_REG"></a>
5195 <h2 class="memtitle"><span class="permalink"><a href="#HDMA4_REG">◆ </a></span>HDMA4_REG</h2>
5196
5197 <div class="memitem">
5198 <div class="memproto">
5199 <table class="memname">
5200 <tr>
5201 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> HDMA4_REG</td>
5202 </tr>
5203 </table>
5204 </div><div class="memdoc">
5205 <p >DMA control 4 </p>
5206
5207 </div>
5208 </div>
5209 <a id="HDMA5_REG" name="HDMA5_REG"></a>
5210 <h2 class="memtitle"><span class="permalink"><a href="#HDMA5_REG">◆ </a></span>HDMA5_REG</h2>
5211
5212 <div class="memitem">
5213 <div class="memproto">
5214 <table class="memname">
5215 <tr>
5216 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> HDMA5_REG</td>
5217 </tr>
5218 </table>
5219 </div><div class="memdoc">
5220 <p >DMA control 5 </p>
5221
5222 </div>
5223 </div>
5224 <a id="RP_REG" name="RP_REG"></a>
5225 <h2 class="memtitle"><span class="permalink"><a href="#RP_REG">◆ </a></span>RP_REG</h2>
5226
5227 <div class="memitem">
5228 <div class="memproto">
5229 <table class="memname">
5230 <tr>
5231 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> RP_REG</td>
5232 </tr>
5233 </table>
5234 </div><div class="memdoc">
5235 <p >IR port </p>
5236
5237 </div>
5238 </div>
5239 <a id="BCPS_REG" name="BCPS_REG"></a>
5240 <h2 class="memtitle"><span class="permalink"><a href="#BCPS_REG">◆ </a></span>BCPS_REG</h2>
5241
5242 <div class="memitem">
5243 <div class="memproto">
5244 <table class="memname">
5245 <tr>
5246 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> BCPS_REG</td>
5247 </tr>
5248 </table>
5249 </div><div class="memdoc">
5250 <p >BG color palette specification </p>
5251
5252 </div>
5253 </div>
5254 <a id="BCPD_REG" name="BCPD_REG"></a>
5255 <h2 class="memtitle"><span class="permalink"><a href="#BCPD_REG">◆ </a></span>BCPD_REG</h2>
5256
5257 <div class="memitem">
5258 <div class="memproto">
5259 <table class="memname">
5260 <tr>
5261 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> BCPD_REG</td>
5262 </tr>
5263 </table>
5264 </div><div class="memdoc">
5265 <p >BG color palette data </p>
5266
5267 </div>
5268 </div>
5269 <a id="OCPS_REG" name="OCPS_REG"></a>
5270 <h2 class="memtitle"><span class="permalink"><a href="#OCPS_REG">◆ </a></span>OCPS_REG</h2>
5271
5272 <div class="memitem">
5273 <div class="memproto">
5274 <table class="memname">
5275 <tr>
5276 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> OCPS_REG</td>
5277 </tr>
5278 </table>
5279 </div><div class="memdoc">
5280 <p >OBJ color palette specification </p>
5281
5282 </div>
5283 </div>
5284 <a id="OCPD_REG" name="OCPD_REG"></a>
5285 <h2 class="memtitle"><span class="permalink"><a href="#OCPD_REG">◆ </a></span>OCPD_REG</h2>
5286
5287 <div class="memitem">
5288 <div class="memproto">
5289 <table class="memname">
5290 <tr>
5291 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> OCPD_REG</td>
5292 </tr>
5293 </table>
5294 </div><div class="memdoc">
5295 <p >OBJ color palette data </p>
5296
5297 </div>
5298 </div>
5299 <a id="SVBK_REG" name="SVBK_REG"></a>
5300 <h2 class="memtitle"><span class="permalink"><a href="#SVBK_REG">◆ </a></span>SVBK_REG</h2>
5301
5302 <div class="memitem">
5303 <div class="memproto">
5304 <table class="memname">
5305 <tr>
5306 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> SVBK_REG</td>
5307 </tr>
5308 </table>
5309 </div><div class="memdoc">
5310 <p >Selects the WRAM upper region bank (CGB Only). WRAM Banking is NOT officially supported in GBDK and SDCC. The stack must be moved and other special care taken. </p>
5311
5312 </div>
5313 </div>
5314 <a id="PCM12_REG" name="PCM12_REG"></a>
5315 <h2 class="memtitle"><span class="permalink"><a href="#PCM12_REG">◆ </a></span>PCM12_REG</h2>
5316
5317 <div class="memitem">
5318 <div class="memproto">
5319 <table class="memname">
5320 <tr>
5321 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> PCM12_REG</td>
5322 </tr>
5323 </table>
5324 </div><div class="memdoc">
5325 <p >Sound channel 1&2 PCM amplitude (R) </p>
5326
5327 </div>
5328 </div>
5329 <a id="PCM34_REG" name="PCM34_REG"></a>
5330 <h2 class="memtitle"><span class="permalink"><a href="#PCM34_REG">◆ </a></span>PCM34_REG</h2>
5331
5332 <div class="memitem">
5333 <div class="memproto">
5334 <table class="memname">
5335 <tr>
5336 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> PCM34_REG</td>
5337 </tr>
5338 </table>
5339 </div><div class="memdoc">
5340 <p >Sound channel 3&4 PCM amplitude (R) </p>
5341
5342 </div>
5343 </div>
5344 <a id="IE_REG" name="IE_REG"></a>
5345 <h2 class="memtitle"><span class="permalink"><a href="#IE_REG">◆ </a></span>IE_REG</h2>
5346
5347 <div class="memitem">
5348 <div class="memproto">
5349 <table class="memname">
5350 <tr>
5351 <td class="memname"><a class="el" href="nes_2hardware_8h.html#__REG">__REG</a> IE_REG</td>
5352 </tr>
5353 </table>
5354 </div><div class="memdoc">
5355 <p >Interrupt enable </p>
5356
5357 </div>
5358 </div>
5359 </div><!-- contents -->
5360 </div><!-- doc-content -->
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5364 <li class="navelem"><a class="el" href="dir_8bd3092e915ccc8a773a74e0a10d4d15.html">gbdk-lib</a></li><li class="navelem"><a class="el" href="dir_a9f896cff747ba031115e41245385c17.html">include</a></li><li class="navelem"><a class="el" href="dir_bdfe001eb73b667f67d57fb851301eb1.html">gb</a></li><li class="navelem"><a class="el" href="gb_2hardware_8h.html">hardware.h</a></li>
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