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gbdk-2020

GameBoy Development Kit
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gbdk-lib/libc/targets/mos6502/nes/global.s

      1         .include "platform_cfg.s"
      2 
      3         ;; Maximum number of times LCD ISR can be repeatedly called
      4         .MAX_LCD_ISR_CALLS = 4
      5         ;; Total number is +1 to support VBL ISR with the same logic
      6         .MAX_DEFERRED_ISR_CALLS = (.MAX_LCD_ISR_CALLS+1)
      7 
      8         ;; Transfer buffer (lower half of hardware stack)
      9         __vram_transfer_buffer = 0x100
     10 
     11         ; Bits for quick checking of OAM validity and display ON/OFF
     12         OAM_VALID_MASK      = 0x80
     13         DISPLAY_OFF_MASK    = 0x40
     14 
     15         ;;  Keypad
     16         .UP             = 0x08
     17         .DOWN           = 0x04
     18         .LEFT           = 0x02
     19         .RIGHT          = 0x01
     20         .A              = 0x80
     21         .B              = 0x40
     22         .SELECT         = 0x20
     23         .START          = 0x10
     24 
     25 ;;  Screen dimensions (in tiles)
     26         .DEVICE_SCREEN_WIDTH            = 32
     27         .DEVICE_SCREEN_HEIGHT           = 30
     28 
     29 ;;  Buffer dimensions (in tiles)
     30 ;;  Dependent on tilemap layout
     31 .ifdef NES_TILEMAP_F
     32         NUM_NT                          = 4
     33         NT_2W                           = 1
     34         NT_2H                           = 1
     35         AT_SHADOW_WIDTH                 = 16
     36         AT_SHADOW_HEIGHT                = 16
     37         .DEVICE_SCREEN_BUFFER_WIDTH     = 64
     38         .DEVICE_SCREEN_BUFFER_HEIGHT    = 60
     39 .endif
     40 .ifdef NES_TILEMAP_H
     41         NUM_NT                          = 2
     42         NT_2W                           = 1
     43         NT_2H                           = 0
     44         AT_SHADOW_WIDTH                 = 16
     45         AT_SHADOW_HEIGHT                = 8
     46         .DEVICE_SCREEN_BUFFER_WIDTH     = 64
     47         .DEVICE_SCREEN_BUFFER_HEIGHT    = 30
     48 .endif
     49 .ifdef NES_TILEMAP_V
     50         NUM_NT                          = 2
     51         NT_2W                           = 0
     52         NT_2H                           = 1
     53         AT_SHADOW_WIDTH                 = 8
     54         AT_SHADOW_HEIGHT                = 16
     55         .DEVICE_SCREEN_BUFFER_WIDTH     = 32
     56         .DEVICE_SCREEN_BUFFER_HEIGHT    = 60
     57 .endif
     58 .ifdef NES_TILEMAP_S
     59         NUM_NT                          = 1
     60         NT_2W                           = 0
     61         NT_2H                           = 0
     62         AT_SHADOW_WIDTH                 = 8
     63         AT_SHADOW_HEIGHT                = 8
     64         .DEVICE_SCREEN_BUFFER_WIDTH     = 32
     65         .DEVICE_SCREEN_BUFFER_HEIGHT    = 30
     66 .endif
     67 
     68         .MAXCURSPOSX    = 31
     69         .MAXCURSPOSY    = 29
     70 
     71         .SCREENWIDTH    = 256
     72         .SCREENHEIGHT   = 240
     73 
     74         ;; NAMETABLES
     75         PPU_NT0         = 0x2000
     76         PPU_AT0         = 0x23C0
     77         PPU_NT1         = 0x2400
     78         PPU_AT1         = 0x27C0
     79         PPU_NT2         = 0x2800
     80         PPU_AT2         = 0x2BC0
     81         PPU_NT3         = 0x2C00
     82         PPU_AT3         = 0x2FC0
     83 
     84         NT_WIDTH                       = 32
     85         NT_HEIGHT                      = 30
     86         AT_WIDTH                       = 8
     87         AT_HEIGHT                      = 8
     88 
     89         ATTRIBUTE_WIDTH                = 16
     90         ATTRIBUTE_HEIGHT               = 15
     91         ATTRIBUTE_PACKED_WIDTH         = 8
     92         ATTRIBUTE_PACKED_HEIGHT        = 8
     93         ATTRIBUTE_MASK_TL = 0b00000011
     94         ATTRIBUTE_MASK_TR = 0b00001100
     95         ATTRIBUTE_MASK_BL = 0b00110000
     96         ATTRIBUTE_MASK_BR = 0b11000000
     97 
     98         ;; Hardware registers / masks
     99         PPUCTRL             = 0x2000
    100         PPUCTRL_NMI         = 0b10000000
    101         PPUCTRL_SPR_8X8     = 0b00000000
    102         PPUCTRL_SPR_8X16    = 0b00100000
    103         PPUCTRL_BG_CHR      = 0b00010000
    104         PPUCTRL_SPR_CHR     = 0b00001000
    105         PPUCTRL_INC32       = 0b00000100
    106         ;
    107         PPUMASK             = 0x2001
    108         PPUMASK_BLUE        = 0b10000000
    109         PPUMASK_RED         = 0b01000000
    110         PPUMASK_GREEN       = 0b00100000
    111         PPUMASK_SHOW_SPR    = 0b00010000
    112         PPUMASK_SHOW_BG     = 0b00001000
    113         PPUMASK_SHOW_SPR_LC = 0b00000100
    114         PPUMASK_SHOW_BG_LC  = 0b00000010
    115         PPUMASK_MONOCHROME  = 0b00000001
    116         ;
    117         PPUSTATUS       = 0x2002
    118         ;
    119         OAMADDR         = 0x2003
    120         ;
    121         OAMDATA         = 0x2004
    122         ;
    123         PPUSCROLL       = 0x2005
    124         ;
    125         PPUADDR         = 0x2006
    126         ;
    127         PPUDATA         = 0x2007
    128         ;
    129         OAMDMA          = 0x4014
    130         ;
    131         JOY1            = 0x4016
    132         ;
    133         JOY2            = 0x4017
    134 
    135         ; Interrupt handler flags
    136         .VBL_IFLAG      = 0x01
    137         .LCD_IFLAG      = 0x02
    138         .TIM_IFLAG      = 0x04
    139 
    140         ;; OAM related constants
    141 
    142         OAM_COUNT       = 64  ; number of OAM entries in OAM RAM
    143 
    144         OAM_POS_Y       = 0
    145         OAM_TILE_INDEX  = 1
    146         OAM_ATTRIBUTES  = 2
    147         OAM_POS_X       = 3
    148 
    149         OAMF_PRI        = 0b00100000 ; Priority
    150         OAMF_YFLIP      = 0b10000000 ; Y flip
    151         OAMF_XFLIP      = 0b01000000 ; X flip
    152 
    153         ;; GBDK library screen modes
    154 
    155         .G_MODE         = 0x01  ; Graphic mode
    156         .T_MODE         = 0x02  ; Text mode (bit 2)
    157         .T_MODE_OUT     = 0x02  ; Text mode output only
    158         .T_MODE_INOUT   = 0x03  ; Text mode with input
    159         .M_NO_SCROLL    = 0x04  ; Disables scrolling of the screen in text mode
    160         .M_NO_INTERP    = 0x08  ; Disables special character interpretation
    161 
    162         ;; Table of routines for modes
    163         .MODE_TABLE     = 0xFFE0
    164 
    165         ;; Values for vblank parity mode when using timer emulation
    166         .TIMER_VBLANK_PARITY_MODE_SYSTEM_60HZ = 0x78
    167         .TIMER_VBLANK_PARITY_MODE_SYSTEM_50HZ = 0x5D
    168 
    169         ;; C related
    170         ;; Overheap of a banked call.  Used for parameters
    171         ;;  = ret + real ret + bank
    172 
    173         .BANKOV         = 6
    174 
    175         .globl  __current_bank
    176         .globl  __shadow_OAM_base
    177 
    178         ;; Global variables
    179         .globl  .mode
    180         .define .tmp "REGTEMP"
    181 
    182         .globl _shadow_PPUCTRL, _shadow_PPUMASK
    183         .globl _bkg_scroll_x, _bkg_scroll_y
    184         .globl __crt0_paletteShadow
    185         .globl _attribute_shadow, _attribute_row_dirty
    186         
    187 .ifdef NES_WINDOW_LAYER
    188         .globl _attribute_shadow_win, __current_vram_cfg_write
    189         ; Number of 8-cycles available each frame for transfer buffer are 1 less with mapper write added
    190         VRAM_DELAY_CYCLES_X8 = 169
    191         ; The VRAM write routines rely on bit 15 of the address (=bit 7 of the high portion) to indicate 
    192         ; that any address in the nametable region (0x2000 - 0x2FFF) writes to the window instead of bkg.
    193         ; This constant should never be changed as instructions are frequently used to test bit7 efficiently.
    194         ; Note that bit 15 does not exist in hardware, as PPU address is only 14 bits. It is purely
    195         ; a software concept to simplify the mapper state handling for VRAM updates.
    196         PPUHI_WIN = 0x80
    197 
    198         ;
    199         ; SHOW_WINDOW bit
    200         ;
    201         WINDOW_ON_MASK = 0x20
    202 
    203         ;
    204         ; Support mapper vram configuration for VRAM transfer buffer.
    205         ; Currently only useful when NES_WINDOW_LAYER is enabled.
    206         ;
    207         VRAM_MAPPER_CFG_TRANSFER = 1
    208 
    209         ;
    210         ; Support mapper vram configuration for deferred-ISR routines.
    211         ; Currently only useful when NES_WINDOW_LAYER is enabled.
    212         ;
    213         VRAM_MAPPER_CFG_ISR = 1
    214 
    215         MAPPER_CFG_NT_MASK = 0x80
    216 .else
    217         VRAM_DELAY_CYCLES_X8 = 171
    218 .endif
    219 
    220         ;; Identity table for register-to-register-adds and bankswitching
    221         .globl .identity, _identity
    222 
    223         ;; Global routines
    224 
    225         .globl  .display_off, .display_on
    226         .globl  .wait_vbl_done
    227 
    228         ;; Symbols defined at link time
    229         .globl _shadow_OAM, __vram_transfer_buffer
    230         .globl __lcd_isr_PPUCTRL, __lcd_isr_PPUMASK
    231         .globl __lcd_isr_scroll_x, __lcd_isr_scroll_y, __lcd_isr_ppuaddr_lo
    232         .globl __lcd_isr_delay_num_scanlines
    233 
    234         ;; Main user routine
    235         .globl  _main
    236 
    237 .macro DIV_PART divident divisor ?lbl
    238         rol divident
    239         rol
    240         sec
    241         sbc divisor
    242         bcs lbl
    243         adc divisor
    244 lbl:
    245 .endm
    246 .macro FAST_MOD8 divident divisor
    247         ; returns modulus in A
    248         .rept 8
    249                 DIV_PART divident divisor
    250         .endm
    251 .endm

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