gbdk-2020 | GameBoy Development Kit |
| download: https://git.y1.nz/archives/gbdk.tar.gz | |
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gbdk-lib/libc/targets/sm83/duck/global.s
1 _VRAM = 0x8000 ; $8000->$9FFF
2 _VRAM8000 = 0x8000
3 _VRAM8800 = 0x8800
4 _VRAM9000 = 0x9000
5 _SCRN0 = 0x9800 ; $9800->$9BFF
6 _SCRN1 = 0x9C00 ; $9C00->$9FFF
7 _SRAM = 0xA000 ; $A000->$BFFF
8 _RAM = 0xC000 ; $C000->$CFFF / $C000->$DFFF
9 _RAMBANK = 0xD000 ; $D000->$DFFF
10 _OAMRAM = 0xFE00 ; $FE00->$FE9F
11 _IO = 0xFF00 ; $FF00->$FF7F,$FFFF
12 _AUD3WAVERAM = 0xFF30 ; $FF30->$FF3F
13 _HRAM = 0xFF80 ; $FF80->$FFFE
14
15 ;; MBC Equates
16
17 rRAMG = 0x0000 ; $0000->$1fff
18 rROMB0 = 0x0001 ; $2000->$2fff
19 rROMB1 = 0x3000 ; $3000->$3fff - If more than 256 ROM banks are present.
20 rRAMB = 0x4000 ; $4000->$5fff - Bit 3 enables rumble (if present)
21
22 rMBC7_SRAM_ENABLE_1 = 0x0000
23 rMBC7_SRAM_ENABLE_2 = 0x4000
24 rMBC7_LATCH_1 = 0xA000
25 rMBC7_LATCH_2 = 0xA010
26 rMBC7_ACCEL_X_LO = 0xA020
27 rMBC7_ACCEL_X_HI = 0xA030
28 rMBC7_ACCEL_Y_LO = 0xA040
29 rMBC7_ACCEL_Y_HI = 0xA050
30
31 ;; Keypad
32 .START = 0x80
33 .SELECT = 0x40
34 .B = 0x20
35 .A = 0x10
36 .DOWN = 0x08
37 .UP = 0x04
38 .LEFT = 0x02
39 .RIGHT = 0x01
40
41 .P14 = 0x10
42 .P15 = 0x20
43
44 ;; Screen dimensions
45 .MAXCURSPOSX = 0x13 ; In tiles
46 .MAXCURSPOSY = 0x11
47
48 .SCREENWIDTH = 0xA0
49 .SCREENHEIGHT = 0x90
50 .MINWNDPOSX = 0x07
51 .MINWNDPOSY = 0x00
52 .MAXWNDPOSX = 0xA6
53 .MAXWNDPOSY = 0x8F
54
55 ;; Hardware registers
56
57 .P1 = 0x00 ; Joystick: 1.1.P15.P14.P13.P12.P11.P10
58 rP1 = 0xFF00
59
60 P1F_5 = 0b00100000 ; P15 out port, set to 0 to get buttons
61 P1F_4 = 0b00010000 ; P14 out port, set to 0 to get dpad
62 P1F_3 = 0b00001000 ; P13 in port
63 P1F_2 = 0b00000100 ; P12 in port
64 P1F_1 = 0b00000010 ; P11 in port
65 P1F_0 = 0b00000001 ; P10 in port
66
67 P1F_GET_DPAD = 0b00100000
68 P1F_GET_BTN = 0b00010000
69 P1F_GET_NONE = 0b00110000
70
71 .SB = 0x01 ; Serial IO data buffer
72 rSB = 0xFF01
73
74 .SC = 0x02 ; Serial IO control register
75 rSC = 0xFF02
76
77 .DIV = 0x04 ; Divider register
78 rDIV = 0xFF04
79
80 .TIMA = 0x05 ; Timer counter
81 rTIMA = 0xFF05
82
83 .TMA = 0x06 ; Timer modulo
84 rTMA = 0xFF06
85
86 .TAC = 0x07 ; Timer control
87 rTAC = 0xFF07
88
89 TACF_START = 0b00000100
90 TACF_STOP = 0b00000000
91 TACF_4KHZ = 0b00000000
92 TACF_16KHZ = 0b00000011
93 TACF_65KHZ = 0b00000010
94 TACF_262KHZ = 0b00000001
95
96 .IFL = 0x0F ; Interrupt flags: 0.0.0.JST.SIO.TIM.LCD.VBL
97 rIF = 0xFF0F
98
99 .NR10 = 0x20 ; Sound register
100 rNR10 = 0xFF20
101 rAUD1SWEEP = 0xFF20
102
103 AUD1SWEEP_UP = 0b00000000
104 AUD1SWEEP_DOWN = 0b00001000
105
106 .NR11 = 0x22 ; Sound register
107 rNR11 = 0xFF22
108 rAUD1LEN = 0xFF22
109
110 .NR12 = 0x21 ; Sound register
111 rNR12 = 0xFF21
112 rAUD1ENV = 0xFF21
113
114 .NR13 = 0x23 ; Sound register
115 rNR13 = 0xFF23
116 rAUD1LOW = 0xFF23
117
118 .NR14 = 0x24 ; Sound register
119 rNR14 = 0xFF24
120 rAUD1HIGH = 0xFF24
121
122 .NR21 = 0x25 ; Sound register
123 rNR21 = 0xFF25
124 rAUD2LEN = 0xFF25
125
126 .NR22 = 0x27 ; Sound register
127 rNR22 = 0xFF27
128 rAUD2ENV = 0xFF27
129
130 .NR23 = 0x28 ; Sound register
131 rNR23 = 0xFF28
132 rAUD2LOW = 0xFF28
133
134 .NR24 = 0x29 ; Sound register
135 rNR24 = 0xFF29
136 rAUD2HIGH = 0xFF29
137
138 .NR30 = 0x2A ; Sound register
139 rNR30 = 0xFF2A
140 rAUD3ENA = 0xFF2A
141
142 .NR31 = 0x2B ; Sound register
143 rNR31 = 0xFF2B
144 rAUD3LEN = 0xFF2B
145
146 .NR32 = 0x2C ; Sound register
147 rNR32 = 0xFF2C
148 rAUD3LEVEL = 0xFF2C
149
150 .NR33 = 0x2E ; Sound register
151 rNR33 = 0xFF2E
152 rAUD3LOW = 0xFF2E
153
154 .NR34 = 0x2D ; Sound register
155 rNR34 = 0xFF2D
156 rAUD3HIGH = 0xFF2D
157
158 .NR41 = 0x40 ; Sound register
159 rNR41 = 0xFF40
160 rAUD4LEN = 0xFF40
161
162 .NR42 = 0x42 ; Sound register
163 rNR42 = 0xFF42
164 rAUD4ENV = 0xFF42
165
166 .NR43 = 0x41 ; Sound register
167 rNR43 = 0xFF41
168 rAUD4POLY = 0xFF41
169
170 .NR44 = 0x43 ; Sound register
171 rNR44 = 0xFF43
172 rAUD4GO = 0xFF43
173
174 .NR50 = 0x44 ; Sound register
175 rNR50 = 0xFF44
176 rAUDVOL = 0xFF44
177
178 AUDVOL_VIN_LEFT = 0b10000000 ; SO2
179 AUDVOL_VIN_RIGHT = 0b00001000 ; SO1
180
181 .NR51 = 0x46 ; Sound register
182 rNR51 = 0xFF46
183 rAUDTERM = 0xFF46
184
185 AUDTERM_4_LEFT = 0b10000000
186 AUDTERM_3_LEFT = 0b01000000
187 AUDTERM_2_LEFT = 0b00100000
188 AUDTERM_1_LEFT = 0b00010000
189 AUDTERM_4_RIGHT = 0b00001000
190 AUDTERM_3_RIGHT = 0b00000100
191 AUDTERM_2_RIGHT = 0b00000010
192 AUDTERM_1_RIGHT = 0b00000001
193
194 .NR52 = 0x45 ; Sound register
195 rNR52 = 0xFF45
196 rAUDENA = 0xFF45
197
198 AUDENA_ON = 0b10000000
199 AUDENA_OFF = 0b00000000 ; sets all audio regs to 0!
200
201 .LCDC = 0x10 ; LCD control
202 rLCDC = 0xFF10
203
204 LCDCF_OFF = 0b00000000 ; LCD Control Operation
205 LCDCF_ON = 0b10000000 ; LCD Control Operation
206 LCDCF_WIN9800 = 0b00000000 ; Window Tile Map Display Select
207 LCDCF_WIN9C00 = 0b00001000 ; Window Tile Map Display Select
208 LCDCF_WINOFF = 0b00000000 ; Window Display
209 LCDCF_WINON = 0b00100000 ; Window Display
210 LCDCF_BG8800 = 0b00000000 ; BG & Window Tile Data Select
211 LCDCF_BG8000 = 0b00010000 ; BG & Window Tile Data Select
212 LCDCF_BG9800 = 0b00000000 ; BG Tile Map Display Select
213 LCDCF_BG9C00 = 0b00000100 ; BG Tile Map Display Select
214 LCDCF_OBJ8 = 0b00000000 ; OBJ Construction
215 LCDCF_OBJ16 = 0b00000010 ; OBJ Construction
216 LCDCF_OBJOFF = 0b00000000 ; OBJ Display
217 LCDCF_OBJON = 0b00000001 ; OBJ Display
218 LCDCF_BGOFF = 0b00000000 ; BG Display
219 LCDCF_BGON = 0b01000000 ; BG Display
220 LCDCF_B_ON = 7
221 LCDCF_B_WIN9C00 = 3
222 LCDCF_B_WINON = 5
223 LCDCF_B_BG8000 = 4
224 LCDCF_B_BG9C00 = 2
225 LCDCF_B_OBJ16 = 1
226 LCDCF_B_OBJON = 0
227 LCDCF_B_BGON = 6
228
229 .STAT = 0x11 ; LCD status
230 rSTAT = 0xFF11
231
232 STATF_LYC = 0b01000000 ; LYC=LY Coincidence (Selectable)
233 STATF_MODE10 = 0b00100000 ; Mode 10
234 STATF_MODE01 = 0b00010000 ; Mode 01 (V-Blank)
235 STATF_MODE00 = 0b00001000 ; Mode 00 (H-Blank)
236 STATF_LYCF = 0b00000100 ; Coincidence Flag
237 STATF_HBL = 0b00000000 ; H-Blank
238 STATF_VBL = 0b00000001 ; V-Blank
239 STATF_OAM = 0b00000010 ; OAM-RAM is used by system
240 STATF_LCD = 0b00000011 ; Both OAM and VRAM used by system
241 STATF_BUSY = 0b00000010 ; When set, VRAM access is unsafe
242 STATF_B_LYC = 6
243 STATF_B_MODE10 = 5
244 STATF_B_MODE01 = 4
245 STATF_B_MODE00 = 3
246 STATF_B_LYCF = 2
247 STATF_B_VBL = 0
248 STATF_B_OAM = 1
249 STATF_B_BUSY = 1
250
251 .SCY = 0x12 ; Scroll Y
252 rSCY = 0xFF12
253
254 .SCX = 0x13 ; Scroll X
255 rSCX = 0xFF13
256
257 .LY = 0x18 ; LCDC Y-coordinate
258 rLY = 0xFF18
259
260 .LYC = 0x19 ; LY compare
261 rLYC = 0xFF19
262
263 .DMA = 0x1A ; DMA transfer
264 rDMA = 0xFF1A
265
266 .BGP = 0x1B ; BG palette data
267 rBGP = 0xFF1B
268
269 .OBP0 = 0x14 ; OBJ palette 0 data
270 rOBP0 = 0xFF14
271
272 .OBP1 = 0x15 ; OBJ palette 1 data
273 rOBP1 = 0xFF15
274
275 .WY = 0x16 ; Window Y coordinate
276 rWY = 0xFF16
277
278 .WX = 0x17 ; Window X coordinate
279 rWX = 0xFF17
280
281 .KEY1 = 0x4D ; CPU speed
282 rKEY1 = 0xFF4D
283 rSPD = 0xFF4D
284
285 KEY1F_DBLSPEED = 0b10000000 ; 0=Normal Speed, 1=Double Speed (R)
286 KEY1F_PREPARE = 0b00000001 ; 0=No, 1=Prepare (R/W)
287
288 .VBK = 0x4F ; VRAM bank
289 rVBK = 0xFF4F
290
291 .HDMA1 = 0x51 ; DMA control 1
292 rHDMA1 = 0xFF51
293
294 .HDMA2 = 0x52 ; DMA control 2
295 rHDMA2 = 0xFF52
296
297 .HDMA3 = 0x53 ; DMA control 3
298 rHDMA3 = 0xFF53
299
300 .HDMA4 = 0x54 ; DMA control 4
301 rHDMA4 = 0xFF54
302
303 .HDMA5 = 0x55 ; DMA control 5
304 rHDMA5 = 0xFF55
305
306 HDMA5F_MODE_GP = 0b00000000 ; General Purpose DMA (W)
307 HDMA5F_MODE_HBL = 0b10000000 ; HBlank DMA (W)
308
309 HDMA5F_BUSY = 0b10000000 ; 0=Busy (DMA still in progress), 1=Transfer complete (R)
310
311 .RP = 0x56 ; IR port
312 rRP = 0xFF56
313
314 RPF_ENREAD = 0b11000000
315 RPF_DATAIN = 0b00000010 ; 0=Receiving IR Signal, 1=Normal
316 RPF_WRITE_HI = 0b00000001
317 RPF_WRITE_LO = 0b00000000
318
319 .BCPS = 0x68 ; BG color palette specification
320 rBCPS = 0xFF68
321
322 BCPSF_AUTOINC = 0b10000000 ; Auto Increment (0=Disabled, 1=Increment after Writing)
323
324 .BCPD = 0x69 ; BG color palette data
325 rBCPD = 0xFF69
326
327 .OCPS = 0x6A ; OBJ color palette specification
328 rOCPS = 0xFF6A
329
330 OCPSF_AUTOINC = 0b10000000 ; Auto Increment (0=Disabled, 1=Increment after Writing)
331
332 .OCPD = 0x6B ; OBJ color palette data
333 rOCPD = 0xFF6B
334
335 .SVBK = 0x70 ; WRAM bank
336 rSVBK = 0xFF70
337 rSMBK = 0xFF70
338
339 rPCM12 = 0xFF76
340
341 rPCM34 = 0xFF77
342
343 .IE = 0xFF ; Interrupt enable
344 rIE = 0xFFFF
345
346 .VBL_IFLAG = 0x01
347 .LCD_IFLAG = 0x02
348 .TIM_IFLAG = 0x04
349 .SIO_IFLAG = 0x08
350 .JOY_IFLAG = 0x10
351
352 IEF_HILO = 0b00010000 ; Transition from High to Low of Pin number P10-P13
353 IEF_SERIAL = 0b00001000 ; Serial I/O transfer end
354 IEF_TIMER = 0b00000100 ; Timer Overflow
355 IEF_STAT = 0b00000010 ; STAT
356 IEF_VBLANK = 0b00000001 ; V-Blank
357
358 ;; Flags common to multiple sound channels
359
360 AUDLEN_DUTY_12_5 = 0b00000000 ; 12.5%
361 AUDLEN_DUTY_25 = 0b01000000 ; 25%
362 AUDLEN_DUTY_50 = 0b10000000 ; 50%
363 AUDLEN_DUTY_75 = 0b11000000 ; 75%
364
365 AUDENV_UP = 0b00001000
366 AUDENV_DOWN = 0b00000000
367
368 AUDHIGH_RESTART = 0b10000000
369 AUDHIGH_LENGTH_ON = 0b01000000
370 AUDHIGH_LENGTH_OFF = 0b00000000
371
372 ;; OAM related constants
373
374 OAM_COUNT = 40 ; number of OAM entries in OAM RAM
375
376 OAMF_PRI = 0b10000000 ; Priority
377 OAMF_YFLIP = 0b01000000 ; Y flip
378 OAMF_XFLIP = 0b00100000 ; X flip
379 OAMF_PAL0 = 0b00000000 ; Palette number; 0,1 (DMG)
380 OAMF_PAL1 = 0b00010000 ; Palette number; 0,1 (DMG)
381 OAMF_BANK0 = 0b00000000 ; Bank number; 0,1 (GBC)
382 OAMF_BANK1 = 0b00001000 ; Bank number; 0,1 (GBC)
383
384 OAMF_PALMASK = 0b00000111 ; Palette (GBC)
385
386 OAMB_PRI = 7 ; Priority
387 OAMB_YFLIP = 6 ; Y flip
388 OAMB_XFLIP = 5 ; X flip
389 OAMB_PAL1 = 4 ; Palette number; 0,1 (DMG)
390 OAMB_BANK1 = 3 ; Bank number; 0,1 (GBC)
391
392 ;; SGB packets
393 .PAL_01 = 0x00
394 .PAL_23 = 0x01
395 .PAL_03 = 0x02
396 .PAL_12 = 0x03
397 .ATTR_BLK = 0x04
398 .ATTR_LIN = 0x05
399 .ATTR_DIV = 0x06
400 .ATTR_CHR = 0x07
401 .SOUND = 0x08
402 .SOU_TRN = 0x09
403 .PAL_SET = 0x0A
404 .PAL_TRN = 0x0B
405 .ATRC_EN = 0x0C
406 .TEST_EN = 0x0D
407 .ICON_EN = 0x0E
408 .DATA_SND = 0x0F
409 .DATA_TRN = 0x10
410 .MLT_REQ = 0x11
411 .JUMP = 0x12
412 .CHR_TRN = 0x13
413 .PCT_TRN = 0x14
414 .ATTR_TRN = 0x15
415 .ATTR_SET = 0x16
416 .MASK_EN = 0x17
417 .OBJ_TRN = 0x18
418
419 ;; CPU detection
420 .DMG_TYPE = 0x01 ; Original GB or Super GB
421 .MGB_TYPE = 0xFF ; Pocket GB or Super GB 2
422 .CGB_TYPE = 0x11 ; Color GB
423
424 ;; GBDK library screen modes
425
426 .G_MODE = 0x01 ; Graphic mode
427 .T_MODE = 0x02 ; Text mode (bit 2)
428 .T_MODE_OUT = 0x02 ; Text mode output only
429 .T_MODE_INOUT = 0x03 ; Text mode with input
430 .M_NO_SCROLL = 0x04 ; Disables scrolling of the screen in text mode
431 .M_NO_INTERP = 0x08 ; Disables special character interpretation
432
433 ;; Status codes for IO
434 .IO_IDLE = 0x00
435 .IO_SENDING = 0x01
436 .IO_RECEIVING = 0x02
437 .IO_ERROR = 0x04
438
439 ;; Type of IO data
440 .DT_IDLE = 0x66
441 .DT_RECEIVING = 0x55
442
443 ;; Table of routines for modes
444 .MODE_TABLE = 0x00F0
445
446 ;; C related
447 ;; Overheap of a banked call. Used for parameters
448 ;; = ret + real ret + bank
449
450 .BANKOV = 6
451
452 .globl __current_bank
453 .globl __shadow_OAM_base
454
455 ;; Global variables
456 .globl .mode
457
458 .globl __cpu
459 .globl __is_GBA
460
461 ;; Global routines
462 .globl .reset
463
464 .globl .display_off
465
466 .globl .wait_vbl_done
467
468 ;; Interrupt routines
469 .globl .add_VBL
470 ; .globl .add_LCD ;; don't link LCD.o by default
471 ; .globl .add_TIM ;; don't link TIM.o by default
472 ; .globl .add_SIO ;; don't link serial.o by default
473 ; .globl .add_JOY ;; don't link JOY.o by default
474
475 ;; Symbols defined at link time
476 .globl .STACK
477 .globl _shadow_OAM
478 .globl .refresh_OAM
479
480 ;; Main user routine
481 .globl _main
482
483 ;; Macro definitions
484
485 .macro WAIT_STAT ?lbl
486 lbl: LDH A, (.STAT)
487 AND #STATF_BUSY ; Check if in LCD modes 0 or 1
488 JR NZ, lbl
489 .endm
490
491 .macro WAIT_STAT_HL ?lbl
492 LD HL, #rSTAT
493 lbl: BIT #STATF_B_BUSY, (HL)
494 JR NZ, lbl
495 .endm
496
497 .macro ADD_A_REG16 regH regL
498 ADD regL
499 LD regL, A
500 ADC regH
501 SUB regL
502 LD regH, A
503 .endm
504
505 .macro SIGNED_ADD_A_REG16 regH regL ?lbl
506 ; If A is negative, we need to subtract 1 from upper byte of 16-bit value
507 BIT 7, A ; set z if a signed bit is 0
508 JR Z, lbl ; if z is set jump to positive
509 dec regH ; if negative decrement upper byte
510 lbl:
511 ADD_A_REG16 regH, regL
512 .endm
513
514 .macro SIGNED_SUB_A_REG16 regH regL ?lbl
515 ; negate A then add to 16-bit value
516 CPL
517 INC A
518 SIGNED_ADD_A_REG16 regH, regL
519 .endm
520
521 .macro MUL_DE_BY_A_RET_HL ?lbl1 ?lbl2 ?lbl3
522 ; Multiply DE by A, return result in HL; preserves: BC
523 LD HL, #0
524 lbl1:
525 SRL A
526 JR NC, lbl2
527 ADD HL, DE
528 lbl2:
529 JR Z, lbl3
530 SLA E
531 RL D
532 JR lbl1
533 lbl3:
534 .endm
535
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