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gbdk-2020

GameBoy Development Kit
download: https://git.y1.nz/archives/gbdk.tar.gz
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gbdk-lib/libc/targets/sm83/duck/sfr.s

      1 __VRAM        = 0x8000
      2 __VRAM8000    = 0x8000
      3 __VRAM8800    = 0x8800
      4 __VRAM9000    = 0x9000
      5 __SCRN0       = 0x9800
      6 __SCRN1       = 0x9C00
      7 __SRAM        = 0xA000
      8 __RAM         = 0xC000
      9 __RAMBANK     = 0xD000
     10 __OAMRAM      = 0xFE00
     11 __IO          = 0xFF00
     12 __AUD3WAVERAM = 0xFF30
     13 __HRAM        = 0xFF80
     14 
     15 .globl __VRAM, __VRAM8000, __VRAM8800, __VRAM9000, __SCRN0, __SCRN1, __SRAM, __RAM, __RAMBANK, __OAMRAM, __IO, __AUD3WAVERAM, __HRAM       
     16 
     17 _rRAMG        = 0x0000
     18 _rROMB0       = 0x0001
     19 _rROMB1       = 0x3000
     20 _rRAMB        = 0x4000
     21 
     22 .globl _rRAMG, _rROMB0, _rROMB1, _rRAMB
     23 
     24 _rMBC7_SRAM_ENABLE_1 = 0x0000
     25 _rMBC7_SRAM_ENABLE_2 = 0x4000
     26 _rMBC7_LATCH_1       = 0xA000
     27 _rMBC7_LATCH_2       = 0xA010
     28 _rMBC7_ACCEL_X_LO    = 0xA020
     29 _rMBC7_ACCEL_X_HI    = 0xA030
     30 _rMBC7_ACCEL_Y_LO    = 0xA040
     31 _rMBC7_ACCEL_Y_HI    = 0xA050
     32 
     33 .globl _rMBC7_SRAM_ENABLE_1, _rMBC7_SRAM_ENABLE_2, _rMBC7_LATCH_1, _rMBC7_LATCH_2, _rMBC7_ACCEL_X_LO, _rMBC7_ACCEL_X_HI, _rMBC7_ACCEL_Y_LO, _rMBC7_ACCEL_Y_HI
     34 
     35 _P1_REG      = 0xFF00    ; Joystick: 1.1.P15.P14.P13.P12.P11.P10
     36 _SB_REG      = 0xFF01    ; Serial IO data buffer
     37 _SC_REG      = 0xFF02    ; Serial IO control register
     38 _DIV_REG     = 0xFF04    ; Divider register
     39 _TIMA_REG    = 0xFF05    ; Timer counter
     40 _TMA_REG     = 0xFF06    ; Timer modulo
     41 _TAC_REG     = 0xFF07    ; Timer control
     42 _IF_REG      = 0xFF0F    ; Interrupt flags: 0.0.0.JOY.SIO.TIM.LCD.VBL
     43 _LCDC_REG    = 0xFF10    ; LCD control
     44 _STAT_REG    = 0xFF11    ; LCD status
     45 _SCY_REG     = 0xFF12    ; Scroll Y
     46 _SCX_REG     = 0xFF13    ; Scroll X
     47 _OBP0_REG    = 0xFF14    ; OBJ palette 0 data
     48 _OBP1_REG    = 0xFF15    ; OBJ palette 1 data
     49 _WY_REG      = 0xFF16    ; Window Y coordinate
     50 _WX_REG      = 0xFF17    ; Window X coordinate
     51 _LY_REG      = 0xFF18    ; LCDC Y-coordinate
     52 _LYC_REG     = 0xFF19    ; LY compare
     53 _DMA_REG     = 0xFF1A    ; DMA transfer
     54 _BGP_REG     = 0xFF1B    ; BG palette data
     55 _NR10_REG    = 0xFF20    ; Sound register
     56 _NR12_REG    = 0xFF21    ; Sound register
     57 _NR11_REG    = 0xFF22    ; Sound register
     58 _NR13_REG    = 0xFF23    ; Sound register
     59 _NR14_REG    = 0xFF24    ; Sound register
     60 _NR21_REG    = 0xFF25    ; Sound register
     61 _NR22_REG    = 0xFF27    ; Sound register
     62 _NR23_REG    = 0xFF28    ; Sound register
     63 _NR24_REG    = 0xFF29    ; Sound register
     64 _NR30_REG    = 0xFF2A    ; Sound register
     65 _NR31_REG    = 0xFF2B    ; Sound register
     66 _NR32_REG    = 0xFF2C    ; Sound register
     67 _NR34_REG    = 0xFF2D    ; Sound register
     68 _NR33_REG    = 0xFF2E    ; Sound register
     69 _NR41_REG    = 0xFF40    ; Sound register
     70 _NR43_REG    = 0xFF41    ; Sound register
     71 _NR42_REG    = 0xFF42    ; Sound register
     72 _NR44_REG    = 0xFF43    ; Sound register
     73 _NR50_REG    = 0xFF44    ; Sound register
     74 _NR52_REG    = 0xFF45    ; Sound register
     75 _NR51_REG    = 0xFF46    ; Sound register
     76 _PCM_SAMPLE  = 0xFF30    ; PCM wave pattern
     77 _AUD3WAVE    = 0xFF30    ; PCM wave pattern
     78 _KEY1_REG    = 0xFF4D    ; CPU speed
     79 _VBK_REG     = 0xFF4F    ; VRAM bank
     80 _HDMA1_REG   = 0xFF51    ; DMA control 1
     81 _HDMA2_REG   = 0xFF52    ; DMA control 2
     82 _HDMA3_REG   = 0xFF53    ; DMA control 3
     83 _HDMA4_REG   = 0xFF54    ; DMA control 4
     84 _HDMA5_REG   = 0xFF55    ; DMA control 5
     85 _RP_REG      = 0xFF56    ; IR port
     86 _BCPS_REG    = 0xFF68    ; BG color palette specification
     87 _BCPD_REG    = 0xFF69    ; BG color palette data
     88 _OCPS_REG    = 0xFF6A    ; OBJ color palette specification
     89 _OCPD_REG    = 0xFF6B    ; OBJ color palette data
     90 _SVBK_REG    = 0xFF70    ; WRAM bank
     91 _PCM12_REG   = 0xFF76    ; Sound channel 1&2 PCM amplitude (R)
     92 _PCM34_REG   = 0xFF77    ; Sound channel 3&4 PCM amplitude (R)
     93 _IE_REG      = 0xFFFF    ; Interrupt enable
     94 
     95 .globl _P1_REG
     96 .globl _SB_REG, _SC_REG
     97 .globl _DIV_REG
     98 .globl _TIMA_REG, _TMA_REG, _TAC_REG
     99 .globl _IF_REG
    100 .globl _NR10_REG, _NR11_REG, _NR12_REG, _NR13_REG, _NR14_REG
    101 .globl _NR21_REG, _NR22_REG, _NR23_REG, _NR24_REG
    102 .globl _NR30_REG, _NR31_REG, _NR32_REG, _NR33_REG, _NR34_REG
    103 .globl _NR41_REG, _NR42_REG, _NR43_REG, _NR44_REG
    104 .globl _NR50_REG, _NR51_REG, _NR52_REG
    105 .globl _PCM_SAMPLE, _AUD3WAVE
    106 .globl _LCDC_REG
    107 .globl _STAT_REG
    108 .globl _SCY_REG, _SCX_REG
    109 .globl _LY_REG, _LYC_REG
    110 .globl _DMA_REG
    111 .globl _BGP_REG
    112 .globl _OBP0_REG, _OBP1_REG
    113 .globl _WY_REG, _WX_REG
    114 .globl _KEY1_REG
    115 .globl _VBK_REG
    116 .globl _HDMA1_REG, _HDMA2_REG, _HDMA3_REG, _HDMA4_REG, _HDMA5_REG
    117 .globl _RP_REG
    118 .globl _BCPS_REG, _BCPD_REG
    119 .globl _OCPS_REG, _OCPD_REG
    120 .globl _SVBK_REG
    121 .globl _PCM12_REG, _PCM34_REG
    122 .globl _IE_REG

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