git.y1.nz

commit 278224299f03083c120836985bd03276935474d6
parent 94add1d172b7496eadb3daa069e408938f230ea2
Author: Lior Halphon <LIJI32@gmail.com>
Date:   Sat, 26 Jun 2021 13:54:18 +0300

Fixed double->single speed switch causing misaligned CPU timing

Diffstat:
M
Core/sm83_cpu.c
2
+-

1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Core/sm83_cpu.c b/Core/sm83_cpu.c
@@ -373,7 +373,7 @@ static void leave_stop_mode(GB_gameboy_t *gb)
     for (unsigned i = 0x1FFF; i--;) {
         GB_advance_cycles(gb, 0x10);
     }
-    GB_advance_cycles(gb, gb->cgb_double_speed? 0x10 : 0xF);
+    GB_advance_cycles(gb, gb->cgb_double_speed? 0x10 : 0xC);
     GB_write_memory(gb, 0xFF00 + GB_IO_DIV, 0);
 }
 

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