gbdk-2020 | GameBoy Development Kit |
| download: https://git.y1.nz/archives/gbdk.tar.gz | |
| README | Files | Log | Refs | LICENSE |
commit 056d3a0c6e24fcebd35ca1466afef5cad6a999f1 parent 9da385756faa7ef6909ecd5b3a79b1bb1d0fd21f Author: Toxa <untoxa@mail.ru> Date: Tue, 6 Apr 2021 14:18:45 +0300 fix SGB detection Diffstat:
| M | gbdk-lib/include/gb/gb.h | 2 | +- |
| M | gbdk-lib/include/gb/sgb.h | 13 | ++----------- |
| M | gbdk-lib/libc/gb/global.s | 3 | +++ |
| M | gbdk-lib/libc/gb/pad.s | 6 | +++--- |
| M | gbdk-lib/libc/gb/pad_ex.s | 17 | +++++++++-------- |
| M | gbdk-lib/libc/gb/sgb.s | 156 | ++++++++++++++++++++++++++++++++++++------------------------------------------- |
6 files changed, 89 insertions(+), 108 deletions(-)
diff --git a/gbdk-lib/include/gb/gb.h b/gbdk-lib/include/gb/gb.h @@ -484,7 +484,7 @@ UINT8 joypad_init(UINT8 npads, joypads_t * joypads); @see joypad_init(), joypads_t */ -void joypad_ex(joypads_t * joypads); +void joypad_ex(joypads_t * joypads) __preserves_regs(b, c); diff --git a/gbdk-lib/include/gb/sgb.h b/gbdk-lib/include/gb/sgb.h @@ -34,7 +34,7 @@ /** Returns a non-null value if running on Super GameBoy */ -UINT8 sgb_check(void); +UINT8 sgb_check(void) __preserves_regs(b, c); /** Transfer a SGB packet @@ -48,15 +48,6 @@ UINT8 sgb_check(void); @see sgb_check() */ -void sgb_transfer(unsigned char * packet); - -/** Transfer a SGB packet without the 60 ms / 4 frame delay at the end - (the delay time is required between consecutive SGB packets) - - @param packet Pointer to buffer with SGB packet data. - - @see sgb_transfer() -*/ -void sgb_transfer_nowait(unsigned char * packet); +void sgb_transfer(unsigned char * packet) __preserves_regs(b, c); #endif /* _SGB_H */ diff --git a/gbdk-lib/libc/gb/global.s b/gbdk-lib/libc/gb/global.s @@ -17,6 +17,9 @@ .LEFT = 0x02 .RIGHT = 0x01 + .P14 = 0x10 + .P15 = 0x20 + .SCREENWIDTH = 0xA0 .SCREENHEIGHT = 0x90 .MINWNDPOSX = 0x07 diff --git a/gbdk-lib/libc/gb/pad.s b/gbdk-lib/libc/gb/pad.s @@ -30,14 +30,14 @@ _waitpadup:: ;; 0x10 - A 0x01 - Right _joypad:: .jpad:: - LD A,#0x20 + LD A,#.P15 LDH (.P1),A ; Turn on P15 LDH A,(.P1) ; Delay LDH A,(.P1) AND #0x0F LD E,A - LD A,#0x10 + LD A,#.P14 LDH (.P1),A ; Turn on P14 LDH A,(.P1) ; Delay LDH A,(.P1) @@ -50,7 +50,7 @@ _joypad:: OR E CPL LD E,A - LD A,#0x30 + LD A,#(.P14 | .P15) LDH (.P1),A ; Turn off P14 and P15 (reset joypad) LD A,E RET diff --git a/gbdk-lib/libc/gb/pad_ex.s b/gbdk-lib/libc/gb/pad_ex.s @@ -3,9 +3,10 @@ .area _BASE _joypad_init:: - call _sgb_check + call .sgb_check ld a, e or a + jr Z, 1$ ldhl sp, #2 @@ -20,20 +21,17 @@ _joypad_init:: 3$: ld hl, #.MLT_REQ_2 call .sgb_transfer - call .sgb_wait4 ld e, #0x02 jr 2$ 4$: ld hl, #.MLT_REQ_4 call .sgb_transfer - call .sgb_wait4 ld e, #0x04 jr 2$ 5$: ld hl, #.MLT_REQ_1 call .sgb_transfer - call .sgb_wait4 1$: ld e, #0x01 2$: @@ -69,15 +67,18 @@ _joypad_ex:: push bc ld b, a 1$: - ld a, #0x30 + ld a, #(.P14 | .P15) ldh (#.P1), a ldh a, (#.P1) + ldh a, (#.P1) + ldh a, (#.P1) + ldh a, (#.P1) and #0x0f sub #0x0f cpl inc a ; A contains joypad number - and #3 ; buffer overrun protection + and #0x03 ; buffer overrun protection add e ; HL = DE + A ld l, a @@ -85,13 +86,13 @@ _joypad_ex:: sub l ld h, a - ld a, #0x20 + ld a, #.P15 ldh (#.P1), a ldh a, (#.P1) ldh a, (#.P1) and #0x0f ld c, a - ld a, #0x10 + ld a, #.P14 ldh (#.P1), a ldh a, (#.P1) ldh a, (#.P1) diff --git a/gbdk-lib/libc/gb/sgb.s b/gbdk-lib/libc/gb/sgb.s @@ -1,4 +1,4 @@ - .include "global.s" + .include "global.s" .PAL_01 = 0x00 .PAL_23 = 0x01 @@ -32,87 +32,68 @@ ;; Set A to 0xFF when running on SGB ;; Clear A when running on DMG .sgb_check:: -_sgb_check:: ; Banked +_sgb_check:: PUSH BC - LD HL,#.MLT_REQ_2 + LD HL,#.MLT_REQ_4 CALL .sgb_transfer - CALL .sgb_wait4 - LDH A,(.P1) - AND #0x03 - CP #0x03 - JR NZ,.sgb_mode + LD C,#.P1 + LD A,#(.P14 | .P15) + LDH (C),A + LDH A,(C) + LDH A,(C) + LD E, #4 + LDH A,(C) ; read delayed +3$: + LD B, A - LD A,#0x20 ; Controller read (dummy) - LDH (.P1),A - LDH A,(.P1) - LDH A,(.P1) - CPL - AND #0x0F - SWAP A - LD B,A - LD A,#0x30 - LDH (.P1),A - LD A,#0x10 - LDH (.P1),A - LDH A,(.P1) - LDH A,(.P1) - LDH A,(.P1) - LDH A,(.P1) - LDH A,(.P1) - LDH A,(.P1) - LD A,#0x30 - LDH (.P1),A - LDH A,(.P1) - AND #0x03 - CP #0x03 - JR NZ,.sgb_mode + LD A,#.P15 + LDH (C),A + LDH A,(C) + LDH A,(C) -.dmg_mode: - XOR A - LD E,A + LD A,#.P14 + LDH (C),A + LDH A,(C) + LDH A,(C) + + LD A,#(.P14 | .P15) + LDH (C),A + LDH A,(C) + LDH A,(C) + LDH A,(C) + LDH A,(C) ; read delayed + CP B + JR NZ,1$ + + DEC E + JR NZ,3$ +2$: + LD E,#0 POP BC RET - -.sgb_mode: +1$: LD HL,#.MLT_REQ_1 CALL .sgb_transfer - CALL .sgb_wait4 - LD E,#0xFF + LD E,#1 POP BC RET _sgb_transfer:: - PUSH BC - LDA HL,4(SP) + LDHL SP,#2 LD A,(HL+) LD H,(HL) LD L,A - CALL .sgb_transfer - CALL .sgb_wait4 - POP BC - RET - -_sgb_transfer_nowait:: - PUSH BC - LDA HL,4(SP) - LD A,(HL+) - LD H,(HL) - LD L,A - CALL .sgb_transfer - POP BC - RET .sgb_transfer:: + PUSH BC LD A,(HL) ; Top of command data AND #0x03 - RET Z - LD B,A ; Number of translated packet - LD C,#0x00 ; Lower part of #FF00 + JR Z,6$ 1$: - PUSH BC - XOR A ; Start to write - LDH (C),A - LD A,#0x30 + PUSH AF + LD C,#.P1 + LDH (C),A ; Send reset + LD A,#(.P14 | .P15) LDH (C),A LD B,#0x10 ; Set counter to transfer 16 byte 2$: LD E,#0x08 ; Set counter to transfer 8 bit @@ -120,45 +101,50 @@ _sgb_transfer_nowait:: LD D,A 3$: - BIT 0,D - LD A,#0x10 ; P14 = high, P15 = low (output "1") - JR NZ,4$ - LD A,#0x20 ; P14 = low, P15 = high (output "0") + SRL D + LD A,#.P14 ; P14 = high, P15 = low (output "1") + JR C,4$ + LD A,#.P15 ; P14 = low, P15 = high (output "0") 4$: LDH (C),A - LD A,#0x30 ; P14 = high, P15 = high + LDH A,(C) ; delay + LDH A,(C) + LD A,#(.P14 | .P15); P14 = high, P15 = high LDH (C),A - RR D ; Shift 1 bit to right + LDH A,(C) ; delay + LDH A,(C) DEC E JR NZ,3$ DEC B JR NZ,2$ - LD A,#0x20 ; 129th bit "0" output + + LD A,#.P15 ; 129th bit "0" output LDH (C),A - LD A,#0x30 + LDH A,(C) ; delay + LDH A,(C) + LD A,#(.P14 | .P15) LDH (C),A - POP BC - DEC B - JR NZ, 1$ - RET - -.sgb_wait4:: LD DE,#7000 -1$: - NOP ; 1 + - NOP ; 1 + - NOP ; 1 + +5$: + LDH A,(.P1) ; 3 + DEC DE ; 2 + LD A,D ; 1 + OR E ; 1 + - JR NZ,1$ ; 3 = 10 cycles - RET + JR NZ,5$ ; 3 = 10 cycles + POP AF + DEC A + JR NZ, 1$ +6$: + POP BC + RET + + .MLT_REQ_1:: - .byte .MLT_REQ*8|1,0x00 + .byte ((.MLT_REQ << 3) | 1), 0x00 .MLT_REQ_2:: - .byte .MLT_REQ*8|1,0x01 + .byte ((.MLT_REQ << 3) | 1), 0x01 .MLT_REQ_4:: - .byte .MLT_REQ*8|1,0x03 + .byte ((.MLT_REQ << 3) | 1), 0x03
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