gbdk-2020 | GameBoy Development Kit |
| download: https://git.y1.nz/archives/gbdk.tar.gz | |
| README | Files | Log | Refs | LICENSE |
commit b8dc03dcd522860e7f2809532d4b7520ec1767bb parent 375bc8cbb59bfb366260fe2a157275db84a5b320 Author: Toxa <untoxa@mail.ru> Date: Tue, 13 Jul 2021 13:02:05 +0300 save a bunch of bytes in delay.s Diffstat:
| M | gbdk-lib/libc/gb/delay.s | 59 | ++++++++++++++++++++++++++++++----------------------------- |
1 file changed, 30 insertions(+), 29 deletions(-)
diff --git a/gbdk-lib/libc/gb/delay.s b/gbdk-lib/libc/gb/delay.s @@ -10,18 +10,25 @@ ;; ;; Register used: AF, DE .CPMS = 4194/4 ; 4.194304 MHz + +_delay:: + LDA HL,2(SP) ; Skip return address + LD E,(HL) ; DE = delay + INC HL + LD D,(HL) + .delay:: ; 6 cycles for the CALL PUSH BC ; 4 cycles CALL .dly ; 12 cycles to return from .dly (6+1+5) - LD B,#.CPMS/20-2 ; 2 cycles + LD B,#.CPMS/20-2 ; 2 cycles ; ========= ; 24 cycles .ldlp: - JR 1$ ; 3 cycles -1$: JR 2$ ; 3 cycles -2$: JR 3$ ; 3 cycles -3$: JR 4$ ; 3 cycles -4$: JR 5$ ; 3 cycles + PUSH BC ; 4 cycles + POP BC ; 3 cycles + PUSH BC ; 4 cycles + POP BC ; 3 cycles + NOP ; 1 cycles 5$: DEC B ; 1 cycles JP NZ,.ldlp ; 3 cycles (if TRUE: 4 cycles) NOP ; 1 cycles @@ -29,10 +36,11 @@ ; 20 cycles ;; Exit in 16 cycles POP BC ; 3 cycles - JR 6$ ; 3 cycles -6$: JR 7$ ; 3 cycles -7$: JR 8$ ; 3 cycles -8$: RET ; 4 cycles + PUSH BC ; 4 cycles + POP BC ; 3 cycles + NOP ; 1 cycles + NOP ; 1 cycles + RET ; 4 cycles ; ========= ; 16 cycles @@ -42,32 +50,25 @@ LD A,E ; 1 cycles OR D ; 1 cycles RET Z ; 2 cycles (upon return: 5 cycles) - LD B,#.CPMS/20-1 ; 2 cycles + LD B,#.CPMS/20-1 ; 2 cycles ; ========= ; 8 cycles .dlp: - JR 1$ ; 3 cycles -1$: JR 2$ ; 3 cycles -2$: JR 3$ ; 3 cycles -3$: JR 4$ ; 3 cycles -4$: JR 5$ ; 3 cycles -5$: DEC B ; 1 cycles + PUSH BC ; 4 cycles + POP BC ; 3 cycles + PUSH BC ; 4 cycles + POP BC ; 3 cycles + NOP ; 1 cycles + DEC B ; 1 cycles JP NZ,.dlp ; 3 cycles (if TRUE: 4 cycles) NOP ; 1 cycles ; ========= ; 20 cycles ;; Exit in 15 cycles - JR 6$ ; 3 cycles -6$: JR 7$ ; 3 cycles -7$: JR 8$ ; 3 cycles -8$: JR .dly ; 3 cycles + PUSH BC ; 4 cycles + POP BC ; 3 cycles + NOP ; 1 cycles + NOP ; 1 cycles + JR .dly ; 3 cycles ; ========= ; 12 cycles - -_delay:: - LDA HL,2(SP) ; Skip return address - LD E,(HL) ; DE = delay - INC HL - LD D,(HL) - CALL .delay - RET
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